Robust Low Power VLSI
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Conference Paper
O. Faruqe, Le, P., Lee, D., Liu, X., Abdelatty, O., Truesdell, D. S., and Calhoun, B. H., “A Fully Integrated, Custom End-to-End PPG Sensing System for Ultra-Low Power Wearables”, in 2025 IEEE International Symposium on Circuits and Systems (ISCAS), In Press.
A. Mallick, Bashar, M. Khairul, Truesdell, D. S., Calhoun, B. H., Joshi, S., and Shukla, N., “Graph Coloring using Coupled Oscillator-based Dynamical Systems”, in 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021.
Y. Zhang and Calhoun, B. H., “Hold Time Closure for Subthreshold Circuits Using a Two-Phase, Latch Based Timing Method”, in S3S Conference, Monterey, California, 2013.
D. S. Truesdell and Calhoun, B. H., “Improving Dynamic Leakage Suppression Logic with Forward Body Bias in 65nm CMOS”, in IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2019.
H. Patel, Yahya, F., and Calhoun, B. H., “Improving Reliability and Energy Requirements of Memory in Body Sensor Networks.”, in International Conference on VLSI Design, Kolkata, India, 2016.
J. Wang, Nalam, S., Qi, J., Mann, R. W., Stan, M., and Calhoun, B. H., “Improving SRAM Vmin and Yield by Using Variation-Aware BTI Stress”, in CICC, San Jose, CA, 2010.
H. L. Bishop*, Dissanayake*, A., Bowers, S. M., and Calhoun, B. H., “An Integrated 2.4GHz -91.5dBm Sensitivity Within-Packet Duty-Cycled Wake-Up Receiver Achieving 2μW at 100ms Latency”, in IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA (*Equally-Credited Authors), 2021.
Z. Chen, Desman, B. E., Agrawal, A., Farrell, W., Owens, J., Truesdell, D. S., and Calhoun, B. H., “ISPI: A 2-Wire Improved Serial Peripheral Interface with Automatic Routing Algorithm for 2-D In-Textile Distributed Computing and Storage Systems”, in 2025 IEEE Custom Integrated Circuits Conference (CICC) , In Press.
Z. Chen, Desman, B. E., Agrawal, A., Farrell, W., Owens, J., Truesdell, D. S., and Calhoun, B. H., “ISPI: A 2-Wire Improved Serial Peripheral Interface with Automatic Routing Algorithm for 2-D In-Textile Distributed Computing and Storage Systems”, in 2025 IEEE Custom Integrated Circuits Conference (CICC) , In Press.
J. J. Granacki, Calhoun, B. H., Dasu, A. R., Jagasivamani, M., McIlrath, L., and Fritze, M., “LEDRA: A 3DIC Ultra-Low Power FPGA Architecture for DoD Applications”, in GOMAC Tech, 2014.
J. Boley, Chandra, V., Aitken, R., and Calhoun, B., “Leveraging Sensitivity Analysis for Fast, Accurate Estimation of SRAM Dynamic VMIN”, in Design Automation and Test Europe, 2013.
J. Boley, Chandra, V., Aitken, R., and Calhoun, B., “Leveraging Sensitivity Analysis for Fast, Accurate Estimation of SRAM Dynamic VMIN”, in Design Automation and Test Europe, 2013.
H. L. Bishop, Wang, P., Fan, D., Lach, J., and Calhoun, B. H., “Lighting IoT Test Environment (LITE) Platform: Evaluating Light-Powered, Energy HarvestingEmbedded Systems”, in Global Internet of Things Summit (GIoTS), 2018.
O. Abdelatty, Bishop, H., Shi, Y., Chen, X., Alghaihab, A., Calhoun, B., and Wentzloff, D., “A Low Power Bluetooth Low-Energy Transmitter with a 10.5nJ Startup-Energy Crystal Oscillator”, in IEEE European Solid-State Circuits Conference (ESSCIRC), Cracow, Poland, 2019.
O. Abdelatty, Bishop, H., Shi, Y., Chen, X., Alghaihab, A., Calhoun, B., and Wentzloff, D., “A Low Power Bluetooth Low-Energy Transmitter with a 10.5nJ Startup-Energy Crystal Oscillator”, in IEEE European Solid-State Circuits Conference (ESSCIRC), Cracow, Poland, 2019.
S. Kamineni, Gupta, S., and Calhoun, B. H., “MemGen: An Open-Source Framework for Autonomous Generation of Memory Macros”, in IEEE Custom Integrated Circuits Conference (CICC), 2021.PDF icon kamineni2021.pdf (9.26 MB)
A. P. Chandrakasan, Verma, N., Kwong, J., Daly, D., Ickes, N., Finchelstein, D., and Calhoun, B. H., “Micropower Wireless Sensors”, in NSTI Nanotech, 2006, vol. 3, pp. 459-462.
A. P. Chandrakasan, Verma, N., Kwong, J., Daly, D., Ickes, N., Finchelstein, D., and Calhoun, B. H., “Micropower Wireless Sensors”, in NSTI Nanotech, 2006, vol. 3, pp. 459-462.
J. F. Ryan and Calhoun, B. H., “Minimizing Offset for Latching Voltage-Mode Sense Amplifiers for Sub-threshold Operation”, in International Symposium on Quality Electronic Design, 2008, pp. 127-132.
A. D. Jurik, Bolus, J., Weaver, A. F., Calhoun, B. H., and Blalock., T. N., “Mobile Health Monitoring Through Biotelemetry”, in Bodynets, 2009.
D. Kamakshi, Fojtik, M., Khailany, B., Kudva, S., Zhou, Y., and Calhoun, B. H., “Modeling and Analysis of Power Supply Noise Tolerance with Fine-grained GALS Adaptive Clocks”, in ASYNC, 2016.
A. Shrivastava and Calhoun, B. H., “Modeling DC-DC Converter Efficiency and Power Management in Ultra Low Power Systems”, in Subthreshold Microelectronics Conference, 2012.
N. Ownby, Flynn, K., and Calhoun, B. H., “Modeling Energy Aware Photoplethsmography for Personalized Healthcare Applications”, in IEEE Transactions on Biomedical Circuits and Systems, 2022.
K. Flynn, Ownby, N., Wang, P., and Calhoun, B. H., “Modeling Energy-Aware Photoplethysmography Hardware for Personalized Health Care Applications Across Skin Phototypes”, in IEEE Biomedical Circuits and Systems Conference (BioCAS), 2021.
J. Boley, Chandra, V., Aitken, R., and Calhoun, B. H., “Modeling SRAM Dynamic VMIN”, in International Conference on IC Design and Technology (ICICDT), 2014.

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