Dr. Benton Calhoun
Ben received his B.S. degree in electrical engineering with a concentration in computer science from the University of Virginia, Charlottesville, VA, in 2000. He received the M.S. degree and Ph.D. degree in electrical engineering from the Massachusetts Institute of Technology, Cambridge, MA, in 2002 and 2006, respectively. In January 2006, he joined the faculty at the University of Virginia in the Electrical and Computer Engineering Department, where he is now a Professor. His research interests include body sensor node (BSN) design, low power digital circuit design, sub-threshold digital circuits, SRAM design for end-of-the-roadmap silicon, variation tolerant circuit design methodologies, and low energy electronics for medical applications.
Shuo received his BE in Integrated Circuit Design and Integrated System from University of Electronic Science and Technology of China in 2013 and MS in Microelectronics and Solid-State Electronics from Fudan University in 2016. He joined the RLP-VLSI group in July 2016 and is working towards his PhD in Electrical Engineering. His research interests include analog and mixed-signal integrated circuit and system design, particularly in areas of energy-harvesting, DC-DC converters, sensor interfaces, and system-on-chips for ultra-low-power IoT applications. Email: [email protected]
Rishika received her BE in Electronics and Instrumentation from Medicaps Institute of Technology in 2014, and MS in Electrical Engineering from University of Texas at Dallas in 2016. She continued to work as an RFIC Product Engineer for Qualcomm, San Diego before joining the RLP-VLSI group as a PhD student in June 2017.
Sumanth received his Bachelors degree in Electrical and Electronics from SV University and Masters in VLSI Design from VIT University, India in 2012 and 2015 respectively. He worked as Back-end Design-Automation Engineer in Microchip Technology, India for two years before joining the RLP-VLSI group in July 2017. Sumanth is currently working towards his PhD in Electrical Engineering.
Peng received her B.E. degree in Instrumentation and Opto-electronic Engineering from Beihang University, Beijing, China, in 2017. She is currently pursuing her Ph.D. degree in Electrical Engineering at University of Virginia, Charlottesville, VA, USA. Her research interests include modeling and design of ultra-low power mixed-signal sensor interfaces and wearable systems, hardware/software co-design of digital signal processing algorithms for biomedical applications.
Shourya received his B.Tech degree in Electronics and Communication Engineering from GGSIP University, New Delhi in June 2017. He joined the RLP-VLSI group in July 2018. Shourya is currently working towards his PhD in Electrical Engineering.
Natalie received her B.S. in Electrical Engineering from Texas State University in 2018. She joined the RLP-VLSI group in August 2019 and is working towards her PhD in Electrical Engineering.
Katy received her B.S. in Electrical Engineering and Mechanical Engineering from Rensselaer Polytechnic Institute in May 2019. She began pursuing her PhD and working with the RLP-VLSI group in August 2019
Xinjian received his BEng in Microelectronics from Fudan University, Shanghai, China, in 2019. He joined the RLP-VLSI group in July 2019 and is working towards his PhD in Electrical Engineering.
Peter Le received his Bachelors in Computer Engineering from George Mason University in 2019 and joined the RLP-VLSI group in Fall 2020. He is currently working towards his Masters in Computer Engineering.
Suprio did his Bachelors in Electronics and Telecommunication Engineering from University of Pune (India) in 2005, and MS(with thesis on Early IR Drop Analysis flow development) in Electrical Engineering from North Carolina State University (USA) in 2015. He joined the RLP-VLSI group in Spring'2021 to pursue his PhD. He has previously worked for several years in the industry on digital design(both frontend and physical design), design flow automation and development, for different leading companies like Intel, and Cadence Design Systems. Outside his research, he is also into adventure sports like mountain-biking, kayaking etc.
Omar received his BSc in Electrical, Electronic and Communication Engineering from Military Institute of Science and Technology, Dhaka, Bangladesh in 2018. He joined the RLP-VLSI group in July 2021 and is working towards his PhD in Electrical Engineering.
|Nick Napoli||Research Scientist, 2018-2019||Assistant Professor, University of Florida|
|Dilip Vasudevan||Research Scientist, 2015-2016||Berkeley Labs|
|Kevin Leach||Research Scientist, 01/2017-08/2017||Senior Research Fellow, UMich|
|Henry Bishop||PhD, 2021||Amazon|
|Anjana Dissanayake||PhD, 2021||CSEM|
|Daniel Truesdell||PhD, 2021||Everactive|
|Jacob Breiholz||PhD, 2021||Everactive|
|NingXi Liu||PhD, 2019||Apple|
|Arijit Banerjee||PhD, 2018||Global Foundries Inc|
|Abhishek Roy||PhD, 2017||Silicon Labs|
|Harsh Patel||PhD, 2018||Global Foundries Inc|
|Divya Akella||PhD, 2017||Mythic Inc|
|He Qi||PhD, 2017||Apple|
|Christopher J. Lukas||PhD, 2017||PsiKick|
|Farah B. Yahya||PhD, 2017||PsiKick|
|Seyi Ayorinde||PhD, 2016||Army Research Lab|
|Manula Pathirana||MS, 2016||Continued for PhD|
|Patricia Gonzalez||MS, 2015||Continued for PhD in EE department at UVA|
|Yu Huang||MS, 2015||Continued for PhD in CS department at UVA|
|Alicia Klinefelter||PhD, 2015||Intel|
|Jim Boley||PhD, 2015||PsiKick|
|Peter Beshay||MS, 2014||Synopsys|
|Kyle Craig||PhD, 2014||PsiKick|
|Aatmesh Shrivastiva||PhD, 2014||PsiKick|
|Craig Eberhardt||PhD, 2013||Envista Forensics|
|Yanqing Zhang||PhD, 2013||Nvidia|
|Yousef Shakhsheer||PhD, 2013||PsiKick|
|Joe Ryan||PhD, 2011||Intel|
|Satyanand Nalam||PhD, 2011||Intel|
|Sudhanshu Khanna||MS, 2011||Texas Instruments|
|Randy Mann||PhD, 2010||GlobalFoundries|
|Jiajing Wang||PhD, 2010||Intel|
|Jonathan Stocking||MS (MAE), 2010||PhD program in Environmental Science, UVA|
|Steven Jocke||MS, 2009||Lockheed Martin|
|Kyle Ringgenberg||MS, 2009||Lockheed Martin|
|Liang Di||MS, 2008||Intel|
|Satyanand Nalam||MS, 2008||continued for PhD|
Year in the Group
|Chuhong Duan||2011-2012||MIT chip testing, Modeling for body sensor nodes; ADESTO chip testing|
|Kevin Linger||2011-2012||Register File Design|
|Vincent Luu||2012||Modeling for Body Sensor, adapting model to COTS|
|Roman Boyarov||2012||Modeling energy efficient COTS embedded systems|
|Ian Dansey||2012||Modeling physiological data|
|David Moore||2010-2012||Interconnect design, multicore processors|
|Andrew Taylor||2012||Standard cell library generation|
|Domenic Carr||2010-2011||CAD for memory design|
|Daniel Reyno||2010-2011||CAD for memory design|
|Tyler Healy||2009||SRAM layout generation|
|Eyad Lababidi||2009||Low voltage FPGA|
|Bijan Mapar||2009||SRAM layout generation|
|Iberedem Ekure||2008||Low voltage FPGA|
|Jisoon Kim||2008||Low voltage FPGA|
|Jay Hoffman||2008||Low power processor|
|Robert McNish||2008||Heart rate processing|
|Daniel Sosa||2008||Traffic control|
|Alex Dreelin||2008||Traffic control|
|Yonathan Habtemichael||2007||Wearable ECG|