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In Press
D. S. Truesdell, Li, S., and Calhoun, B. H., A 0.5V 560kHz 18.8fJ/Cycle Ultra-Low Energy Oscillator in 65nm CMOS with 96.1ppm/°C Stability Using a Duty-Cycled Digital Frequency-Locked Loop, in 2020 IEEE Symposium on VLSI Circuits (VLSI), In Press.
S. Gupta, Truesdell, D. S., and Calhoun, B. H., A 65nm 16kb SRAM with 131.5pW Leakage at 0.9V for Wireless IoT Sensor Nodes, in 2020 IEEE Symposium on VLSI Circuits (VLSI), In Press.
P. Wang, Agarwala, R., Bishop, H. L., Dissanayake, A., and Calhoun, B. H., A 785nW Multimodal (V/I/R) Sensor Interface IC for Ozone Pollutant Sensing and Correlated Cardiovascular Disease Monitoring, in 2020 IEEE Symposium on VLSI Circuits (VLSI), In Press.
S. Li, Breiholz, J., Kamineni, S., Im, J., Wentzloff, D. D., and Calhoun, B. H., An 85 nW IoT Node-Controlling SoC for MELs Power-Mode Management and Phantom Energy Reduction, in 2020 IEEE International Symposium on Circuits and Systems (ISCAS), In Press.
H. L. Bishop, Wang, P., and Calhoun, B. H., Application-Driven Model of a PPG Sensing Modality for the Informed Design of Self-Powered, Wearable Healthcare Systems, in 2020 IEEE International Symposium on Circuits and Systems (ISCAS), In Press.
A. Dissanayake, Bishop, H. L., Moody, J., Muhlbauer, H., Calhoun, B. H., and Bowers, S. M., A Multichannel, MEMS-less -99dBm 260nW Bit-level Duty Cycled Wakeup Receiver, in 2020 IEEE Symposium on VLSI Circuits (VLSI), In Press.
2019
D. S. Truesdell, Dissanayake, A., and Calhoun, B. H., A 0.6-V 44.6-fJ/Cycle Energy-Optimized Frequency-Locked Loop in 65-nm CMOS With 20.3-ppm/°C Stability, IEEE Solid-State Circuits Letters (SSCL), 2019.PDF icon A 0.6-V 44.6-fJ Cycle Energy-Optimized Frequency-Locked Loop in 65-nm CMOS With 20.3-ppm C Stability.pdf (1.64 MB)
C. J. Lukas, Yahya, F. B., Breiholz, J., Roy, A., Chen, X., Patel, H. N., Liu, N. X., Kosari, A., Li, S., Kamakshi, D. Akella, Ayorinde, O., Wentzloff, D. D., and Calhoun, B. H., A 1.02 μW Battery-Less, Continuous Sensing and Post-Processing SiP for Wearable Applications, IEEE Transactions on Biomedical Circuits and Systems, 2019.PDF icon 08625544.pdf (3.22 MB)
J. Moody, Dissanayake, A., Bishop, H., Lu, R., Liu, N. X., Duvvuri, D., Gao, A., Truesdell, D. S., N. Barker, S., Gong, S., Calhoun, B. H., and Bowers, S. M., A -106dBm 33nW Bit-Level Duty-Cycled Tuned RF Wake-up Receiver, in 2019 Symposium on VLSI Circuits, Kyoto, Japan, 2019.
N. X. Liu, Agarwala, R., Dissanayake, A., Truesdell, D. S., Kamineni, S., and Calhoun, B. H., A 2.5 ppm/°C 1.05 MHz Relaxation Oscillator with Dynamic Frequency-Error Compensation and Fast Start-Up Time, IEEE Journal of Solid-State Circuits (JSSC), 2019.
D. S. Truesdell and Calhoun, B. H., A 640 pW 22 pJ/sample Gate Leakage-Based Digital CMOS Temperature Sensor with 0.25°C Resolution, in IEEE Custom Integrated Circuits Conference (CICC) 2019, Austin, TX, 2019.PDF icon A 640 pW 22 pJ_sample Gate Leakage-Based Digital CMOS Temperature Sensor with 0.25C Resolution.pdf (1.81 MB)
D. S. Truesdell, Breiholz, J., Kamineni, S., Liu, N. X., Magyar, A., and Calhoun, B. H., A 6–140-nW 11 Hz–8.2-kHz DVFS RISC-V Microprocessor Using Scalable Dynamic Leakage-Suppression Logic, IEEE Solid-State Circuits Letters (SSCL), 2019.PDF icon A 6–140-nW 11 Hz–8.2-kHz DVFS RISC-V Microprocessor Using Scalable Dynamic Leakage-Suppression Logic (1.63 MB)
S. Li and Calhoun, B. H., A 745pA Hybrid Asynchronous Binary-Searching and Synchronous Linear-Searching Digital LDO with 3.8×105 Dynamic Load Range, 99.99% Current Efficiency, and 2mV Output Voltage Ripple, in IEEE International Solid- State Circuits Conference (ISSCC), San Francisco, CA, 2019.
X. Chen, Breiholz, J., Yahya, F. B., Lukas, C. J., Kim, H. - S., Calhoun, B. H., and Wentzloff, D. D., Analysis and Design of an Ultra-Low-Power Bluetooth Low-Energy Transmitter With Ring Oscillator-Based ADPLL and 4 Frequency Edge Combiner, IEEE Journal of Solid-State Circuits, 2019.
A. Banerjee, A Double Pumped Single-Line-Cache SRAM Architecture for Ultra-low Energy IoT and Machine Learning Applications, in 32nd International Conference on VLSI Design, 2019.
A. Alghaihab, Shi, Y., Breiholz, J., Kim, H. - S., Calhoun, B. H., and Wentzloff, D. D., Enhanced Interference Rejection Bluetooth Low-Energy Back-Channel Receiver With LO Frequency Hopping, IEEE Journal of Solid-State Circuits, 2019.
J. Moody, Dissanayake, A., Bishop, H. L., Lu, R., Liu, N. X., Duvvuri, D., Gao, A., Truesdell, D. S., N. Barker, S., Gong, S., Calhoun, B. H., and Bowers, S. M., A Highly Re-configurable Bit-level Duty Cycled TRF Receiver Achieving -106 dBm Sensitivity and 33 nW Average Power Consumption, IEEE Solid-State Circuits Letters (SSCL), Special Issue on VLSI (invited paper), 2019.
D. S. Truesdell and Calhoun, B. H., Improving Dynamic Leakage Suppression Logic with Forward Body Bias in 65nm CMOS, in IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2019.PDF icon Improving Dynamic Leakage Suppression Logic with Forward Body Bias in 65nm CMOS.pdf (4.79 MB)
J. Moody, Bassirian, P., Roy, A., Liu, N. X., N Barker, S., Calhoun, B. H., and Bowers, S. M., Interference Robust Detector-First Near-Zero Power Wake-Up Receiver, IEEE Journal of Solid-State Circuits, 2019.
O. Abdelatty, Bishop, H., Shi, Y., Chen, X., Alghaihab, A., Calhoun, B., and Wentzloff, D., A Low Power Bluetooth Low-Energy Transmitter with a 10.5nJ Startup-Energy Crystal Oscillator, in IEEE European Solid-State Circuits Conference (ESSCIRC), Cracow, Poland, 2019.

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