Publications
βAnalyzing Static Noise Margin for Sub-threshold SRAM in 65nm CMOSβ, in European Solid-State Circuits Conference, 2005, pp. 363-366.
, βMicropower Wireless Sensorsβ, in NSTI Nanotech, 2006, vol. 3, pp. 459-462.
, βAnalysis and Design of an Ultra-Low-Power Bluetooth Low-Energy Transmitter With Ring Oscillator-Based ADPLL and 4 Frequency Edge Combinerβ, IEEE Journal of Solid-State Circuits, 2019.
, βA 486 Β΅W All-Digital Bluetooth Low Energy Transmitter with Ring Oscillator Based ADPLL for IoT applicationsβ, in IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2018.
, βA Crystal-Less BLE Transmitter with Clock Recovery from GFSK-Modulated BLE Packetsβ, IEEE Journal of Solid-State Circuits, 2021.
, βOptimal Power Switch Design for Panoptic Dynamic Voltage Scaling Enabling Subthreshold Operationβ, in Subthreshold Microelectronics Conference, 2011.
, βA 32b 90nm Processor Implementing Panoptic DVS Achieving Energy Efficient Operation from Sub-threshold to High Performanceβ, Journal of Solid State Circuits, 2014.
, βA Programmable Resistive Power Grid for Post-Fabrication Flexibility and Energy Tradeoffsβ, in International Symposium on Low Power Electronics and Design, 2012.
, βOptimal Power Switch Design for Dynamic Voltage Scaling from High Performance to Subthreshold Operationβ, in International Symposium on Low Power Electronics and Design, 2012.
, βPower Switch Characterization for Fine-Grained Dynamic Voltage Scalingβ, in International Conference on Computer Design, pages 605-611, 2008.
, βStacked Transconductance Boosting for Ultra-Low Power 2.4GHz RF Front-End Designβ, in 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021.
, βA 2.4 GHz-91.5 dBm Sensitivity Within-Packet Duty-Cycled Wake-Up Receiverβ, IEEE Journal of Solid-State Circuits, 2021.
, βA Multichannel, MEMS-less -99dBm 260nW Bit-level Duty Cycled Wakeup Receiverβ, in 2020 IEEE Symposium on VLSI Circuits (VLSI), 2020.
, βA -108dBm Sensitivity, -28dB SIR, 130nW to 41ΞΌW, Digitally Reconfigurable Bit-Level Duty-Cycled Wakeup and Data Receiverβ, in IEEE Custom Integrated Circuits Conference (CICC), 2020.
, βA 366 nW, -74.5 dBm Sensitivity Antenna-Coupled Wakeup Receiver at 4.9 GHz with Integrated Voltage Regulation and Referencesβ, in IEEE MTT-S International Microwave Symposium (IMS), Atlanta, GA, 2021.
, βDevelopment of an artificial sensor for hydrodynamic detection inspired by a sealβs whisker arrayβ, Bioinspiration and Biomimetics, 2016.
, βA Bio-Inspired Artificial Whisker for Fluid Motion Sensing with Increased Sensitivity and Reliabilityβ, in IEEE Sensors, Limrick, Ireland, 2011.
, βA 10-Channel, 1.2 Β΅W, Reconfigurable Capacitanceto-Digital Converter for Low-Power, Wearable Healthcare Applicationsβ, in 2023 IEEE Biomedical Circuits and Systems Conference, 2023.
, βModeling Energy-Aware Photoplethysmography Hardware for Personalized Health Care Applications Across Skin Phototypesβ, in IEEE Biomedical Circuits and Systems Conference (BioCAS), 2021.
, βA 0.6V 8 pJ/write Non-Volatile CBRAM Macro Embedded in a Body Sensor Node for Ultra Low Energy Applicationsβ, in Symposium on VLSI Circuits, 2013.
, βLEDRA: A 3DIC Ultra-Low Power FPGA Architecture for DoD Applicationsβ, in GOMAC Tech, 2014.
, βExploiting Dynamically Changing Parallelism with a Reconfigurable Array of Homogeneous Sub-coresβ, in TECHCON, 2010.
, βDynamic Read VMIN and Yield Estimation for Nanoscale SRAMsβ, IEEE Transactions on Circuits and Systems I: Regular Papers, 2021. Dynamic Read VMIN and Yield Estimation of Nanoscale SRAMs.pdf (3.72 MB)
, βDynamic Write VMIN and Yield Estimation for Nanoscale SRAMsβ, IEEE Transactions on Circuits and Systems I: Regular Papers, 2021. Dynamic Write VMIN and Yield Estimation for Nanoscale SRAMs.pdf (4.55 MB)
, βScalable All-Analog LDOs With Reduced Input Offset Variability Using Digital Synthesis Flow in 65-nm CMOSβ, in IEEE Transactions on Very Large Scale Integration (TVLSI) Systems, 2023.
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