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H

J. Moody, Dissanayake, A., Bishop, H. L., Lu, R., Liu, N. X., Duvvuri, D., Gao, A., Truesdell, D. S., N. Barker, S., Gong, S., Calhoun, B. H., and Bowers, S. M., “A Highly Re-configurable Bit-level Duty Cycled TRF Receiver Achieving -106 dBm Sensitivity and 33 nW Average Power Consumption”, IEEE Solid-State Circuits Letters (SSCL), Special Issue on VLSI (invited paper), 2019.

G

A. Mallick, Bashar, M. Khairul, Truesdell, D. S., Calhoun, B. H., Joshi, S., and Shukla, N., “Graph Coloring using Coupled Oscillator-based Dynamical Systems”, in 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021.

F

T. Ajayi, Cherivirala, Y. K., Kwon, K., Kamineni, S., Saligane, M., Fayazi, M., Gupta, S., Chen, C. - H., Sylvester, D., Blaauw, D., Dreslinski, Jr, R., Calhoun, B. H., and Wentzloff, D. D., “Fully Autonomous Mixed Signal SoC Design & Layout Generation Platform”, IEEE Hot Chips 32 Symposium (HCS). 2020.

V. Misra, Bozkurt, A., Calhoun, B., Jackson, T., Jur, J., Lach, J., Lee, B., Muth, J., Oralkan, O., Ozturk, M., Trolier-McKinstry, S., Vashaee, D., Wentzloff, D., and Zhu, Y., “Flexible Technologies for Self-Powered Wearable Health and Environmental Sensing”, Proceedings of the IEEE, vol. 103, pp. 665-681, 2015.

P. Sotiriadis, Franza, O., Bailey, D., Calhoun, B., Lin, D., and Chandrakasan, A., “Fast Algorithm for Clock Grid Simulation”, in European Solid State Circuits Conference (ESSCIRC), 2002, pp. 771-774.

E

A. Alghaihab, Shi, Y., Breiholz, J., Kim, H. - S., Calhoun, B. H., and Wentzloff, D. D., “Enhanced Interference Rejection Bluetooth Low-Energy Back-Channel Receiver With LO Frequency Hopping”, IEEE Journal of Solid-State Circuits, 2019.

S. N. Wooters, Calhoun, B. H., and Blalock, T. N., “An Energy-Efficient Subthreshold Level Converter in 130-nm CMOS”, IEEE Transactions on Circuits and Systems II, vol. 57, pp. 290-294, 2010.

Y. Zhang, Shakhsheer, Y., Barth, A. T., Powell, Jr., H. C., Ridenour, S. A., Hanson, M. A., Lach, J., and Calhoun, B. H., “Energy Efficient Design for Body Sensor Nodes”, Journal of Low Power Electronics and Applications, 2011.

D

A. Banerjee, “A Double Pumped Single-Line-Cache SRAM Architecture for Ultra-low Energy IoT and Machine Learning Applications”, in 32nd International Conference on VLSI Design, 2019.

P. Beshay, Chandra, V., Aitken, R., and Calhoun, B. H., “A Digital Dynamic Write Margin Sensor for Low Power Read/Write Operations in 28nm SRAM”, in ISLPED, 2014.

P. Beshay, Ryan, J. F., and Calhoun, B. H., “A Digital Auto-Zeroing Circuit to Reduce Offset in Sub-threshold Sense Amplifiers”, Journal of Low Power Electronics and Applications, 2013.

Y. Huang, Shrivastava, A., Barnes, L., and Calhoun, B. H., “A Design and Theoretical Analysis of a 145 mV to 1.2 V Single-Ended Level Converter Circuit for Ultra-Low Power Low Voltage ICs”, J. Low Power Electron. Appl. (JLPEA), vol. 6, 2016.

C

B. H. Calhoun and Brooks, D., “Can Subthreshold and Near-Threshold Circuits Go Mainstream?”, IEEE Micro, vol. 30, pp. 80-85, 2010.

B

B. H. Calhoun, Lach, J., Stankovic, J., Wentzloff, D. D., Whitehouse, K., Barth, A., Brown, J. K., Li, Q., Oh, S., Roberts, N., and Zhang, Y., “Body Sensor Networks: A Holistic Approach From Silicon to Users”, IEEE Proceedings, 2011.

B. H. Calhoun, Lach, J., Stankovic, J., Wentzloff, D. D., Whitehouse, K., Barth, A., Brown, J. K., Li, Q., Oh, S., Roberts, N., and Zhang, Y., “Body Sensor Networks: A Holistic Approach From Silicon to Users”, IEEE Proceedings, 2011.

M. A. Hanson, Jr, H. C. Powell, Barth, A. T., Ringgenberg, K., Calhoun, B. H., Aylor, J. H., and Lach, J., “Body Area Sensor Networks: Challenges and Opportunities”, Computer, vol. 42, pp. 58–65, 2009.

F. Yahya, Lukas, C. J., Breiholz, J., Roy, A., Patel, H. N., Liu, N. X., Chen, X., Kosari, A., Li, S., Akella, D., Ayorinde, O., Wentzloff, D. D., and Calhoun, B. H., “A battery-less 507nW SoC with integrated platform power manager and SiP interfaces”, in 2017 Symposium on VLSI Circuits, Kyoto, Japan, 2017.

F. Zhang, Zhang, Y., Silver, J., Shakhsheer, Y., Nagaraju, M., Klinefelter, A., Pandey, J., Boley, J., Carlson, E., Shrivastava, A., Otis, B., and Calhoun, B., “A Batteryless 19uW MICS/ISM-Band Energy Harvesting Body Area Sensor Node SoC”, in ISSCC, San Francisco, 2012.

Y. Zhang, Zhang, F., Shakhsheer, Y., Silver, J. D., Klinefelter, A., Nagaraju, M., Boley, J., Pandey, J., Shrivastava, A., Carlson, E. J., Wood, A., Calhoun, B. H., and Otis, B. P., “A Batteryless 19 uW MICS/ISM-Band Energy Harvesting Body Sensor Node SoC for ExG Applications”, Journal of Solid State Circuits, vol. 48, pp. 199-213, 2013.

A

H. L. Bishop, Wang, P., and Calhoun, B. H., “Application-Driven Model of a PPG Sensing Modality for the Informed Design of Self-Powered, Wearable Healthcare Systems”, in 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020.

J. Boley, Wang, J., and Calhoun, B. H., “Analyzing Sub-Threshold Bitcell Topologies and the Effects of Assist Methods on SRAM Vmin”, Journal of Low Power Electronics and Applications, 2012.

J. Boley, Wang, J., and Calhoun, B. H., “Analyzing Sub-Threshold Bitcell Topologies and the Effects of Assist Methods on SRAM VMIN”, Journal of Low Power Electronics and Applications (JLPEA), vol. 2, p. 12, 2012.

J. Boley, Calhoun, B. H., and Wang, J., “Analyzing Subthreshold Bitcell Topologies and the Effects of Assist Methods on SRAM Vmin”. 2011.

X. Chen, Breiholz, J., Yahya, F. B., Lukas, C. J., Kim, H. - S., Calhoun, B. H., and Wentzloff, D. D., “Analysis and Design of an Ultra-Low-Power Bluetooth Low-Energy Transmitter With Ring Oscillator-Based ADPLL and 4 Frequency Edge Combiner”, IEEE Journal of Solid-State Circuits, 2019.

8

S. Li, Breiholz, J., Kamineni, S., Im, J., Wentzloff, D. D., and Calhoun, B. H., “An 85 nW IoT Node-Controlling SoC for MELs Power-Mode Management and Phantom Energy Reduction”, in 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020.

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