Robust Low Power VLSI

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2017

S. Z. Ahmed, Tan, Y., Truesdell, D. S., and Ghosh, A., “Auger Effect Limited Performance in Tunnel Field Effect Transistors”, in 5th Berkeley Symposium on Energy Efficient Electronics & Steep Transistors Workshop, Berkeley, CA, 2017.

2018

S. Z. Ahmed, Tan, Y., Truesdell, D. S., Calhoun, B. H., and Ghosh, A., “Modeling tunnel field effect transistors-from interface chemistry to non-idealities to circuit level performance”, Journal of Applied Physics, 2018.

2020

S. Z. Ahmed, Truesdell, D. S., Tan, Y., Calhoun, B. H., and Ghosh, A. W., “A comprehensive analysis of Auger generation impacted planar Tunnel FETs”, Solid-State Electronics, 2020.

D. S. Truesdell, Ahmed, S. Z., Ghosh, A. W., and Calhoun, B. H., “Minimum-Energy Digital Computing with Steep Subthreshold Swing Tunnel FETs”, IEEE Journal of Exploratory Solid-State Computational Devices and Circuits (JxCDC), 2020.

Minimum-Energy Digital Computing With Steep Subthreshold Swing Tunnel FETs.pdf (1.02 MB)