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A 6–140-nW 11 Hz–8.2-kHz DVFS RISC-V Microprocessor Using Scalable Dynamic Leakage-Suppression Logic
A 6–140-nW 11 Hz–8.2-kHz DVFS RISC-V Microprocessor Using Scalable Dynamic Leakage-Suppression Logic
D. S. Truesdell, Breiholz, J., Kamineni, S., Liu, N. X., Magyar, A., and Calhoun, B. H.,
“A 6–140-nW 11 Hz–8.2-kHz DVFS RISC-V Microprocessor Using Scalable Dynamic Leakage-Suppression Logic”,
IEEE Solid-State Circuits Letters (SSCL), 2019.
