Publications
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, “An Enhanced Adaptive Canary System for SRAM Standby Power Reduction”, in TECHCON, 2008.
, “Minimizing Offset for Latching Voltage-Mode Sense Amplifiers for Sub-threshold Operation”, in International Symposium on Quality Electronic Design, 2008, pp. 127-132.
, “Power Switch Characterization for Fine-Grained Dynamic Voltage Scaling”, in International Conference on Computer Design, pages 605-611, 2008.
, “Recursive Statistical Blockade: An Enhanced Technique for Rare Event Simulation with Application to SRAM Circuit Design”, in International Conference on VLSI Design, India, 2008, pp. 131-136.
, “Techniques to Extend Canary-based Standby VDD Scaling for SRAMs to 45nm and Beyond”, IEEE Journal of Solid-State Circuits, vol. 43, pp. 2514-2523, 2008.
, “A 2.6-μW Sub-threshold Mixed-signal ECG SoC”, in Symposium on VLSI Circuits, 2009.
, “Mobile Health Monitoring Through Biotelemetry”, in Bodynets, 2009.
, “MSN: Memory Sensor for NBTI”, in Techcon, 2009.
, “Optimizing Power @ Design Time – Memory”, in Low Power Design Essentials, 2009.
, “Optimizing Power @ Standby – Memory”, in Low Power Design Essentials, 2009.
, “Panoptic DVS: A Fine-Grained Dynamic Voltage Scaling Framework for Energy Scalable CMOS Design”, in International Conference on Computer Design (ICCD), 2009, pp. 491-497.
, “Serial Sub-threshold Circuits for Ultra-Low-Power Systems”, in International Symposium on Low Power Electronics and Design, 2009.
, “Sub-threshold Operation and Cross-Hierarchy Design for Ultra Low Power Wearable Sensors”, in International Symposium on Circuits and Systems, 2009.
, “Can Subthreshold and Near-Threshold Circuits Go Mainstream?”, IEEE Micro, vol. 30, pp. 80-85, 2010.
, “An Energy-Efficient Subthreshold Level Converter in 130-nm CMOS”, IEEE Transactions on Circuits and Systems II, vol. 57, pp. 290-294, 2010.
, “Exploiting Dynamically Changing Parallelism with a Reconfigurable Array of Homogeneous Sub-cores”, in TECHCON, 2010.
, “Flexible Circuits and Architectures for Ultra Low Power”, Proceedings of the IEEE, vol. 98, pp. 267-282, 2010.
, “SRAM-Based NBTI/PBTI Sensor System Design”, in Design Automation Conference (DAC), San Diego, CA, 2010, pp. 849-852.
, “Standby Supply Voltage Minimization for Reliable Nanoscale SRAMs”, in Solid State Circuits Technologies, INTECH, 2010.
, “A Sub-Threshold FPGA with Low-Swing Dual-VDD Interconnect in 90nm CMOS”, in Custom Integrated Circuits Conference (CICC), 2010.
, “System Design Principles Combining Sub-threshold Circuits and Architectures with Energy Scavening Mechanisms”, in International Symposium on Circuits and Systems (ISCAS), Paris, France, 2010, pp. 269-272.
, “Two Fast Methods for Estimating the Minimum Standby Supply Voltage for Large SRAMs”, Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 29, pp. 1908-1920, 2010.
, “5T SRAM with Asymmetric Sizing for Improved Read Stability”, JSSC, 2011.
, “Body Sensor Networks: A Holistic Approach From Silicon to Users”, IEEE Proceedings, 2011.