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Author Title Type [ Year(Desc)]
Filters: First Letter Of Last Name is C and Author is B. H. Calhoun  [Clear All Filters]
2016
N. E. Roberts, Craig, K., Shrivastava, A., Wooters, S. N., Shakhsheer, Y., Calhoun, B. H., and Wentzloff, D. D., A 236nW -56.5dBm Sensitivity Self-Powered Bluetooth Low-Energy Wakeup Receiver in 65nm CMOS, in IEEE International Solid-State Circuits Conference (ISSCC), 2016.
D. Akella, Shrivastava, A., Duan, C., and Calhoun, B. H., A 36nW, 7 ppm/oC Fully On-Chip Clock Source System for Ultra-Low Power Applications, Journal of Low Power Electronics and Applications (JLPEA), vol. 6, 2016.
H. N. Patel, Roy, A., Yahya, F. B., Liu, N., Kumeno, K., Yasuda, M., Harada, A., Ema, T., and Calhoun, B. H., A 55nm Ultra Low Leakage Deeply Depleted Channel Technology Optimized for Energy Minimization in Subthreshold SRAM and Logic, in European Solid State Circuits Conference (ESSCIRC), 2016.
Y. Huang, Shrivastava, A., Barnes, L., and Calhoun, B. H., A Design and Theoretical Analysis of a 145 mV to 1.2 V Single-Ended Level Converter Circuit for Ultra-Low Power Low Voltage ICs, J. Low Power Electron. Appl. (JLPEA), vol. 6, 2016.
N. Liu and Calhoun, B. H., Design Optimization of Register File Throughput and Energy using a Virtual Prototyping (ViPro) Tool, in IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2016.
W. Eberhardt, Wakefield, B., Casey, C., Murphy, C., Calhoun, B. H., and Reichmuth, C., Development of an artificial sensor for hydrodynamic detection inspired by a seal’s whisker array, Bioinspiration and Biomimetics, 2016.
D. Kamakshi, Fojtik, M., Khailany, B., Kudva, S., Zhou, Y., and Calhoun, B. H., Modeling and Analysis of Power Supply Noise Tolerance with Fine-grained GALS Adaptive Clocks, in ASYNC, 2016.
F. Yahya, Patel, H., Boley, J., Banerjee, A., and Calhoun, B. H., A Sub-threshold 8T SRAM Macro with 12.29nW/KB Standby Power and 6.24 pJ/access for Battery-Less IoT SoCs, J. Low Power Electron. Appl. (JLPEA), vol. 6, 2016.
P. Long, Huang, J. Z., Povolotskyi, M., Verreck, D., Charles, J., Kubis, T., Klimeck, G., Rodwell, M. J. W., and Calhoun, B. H., A Tunnel FET Design for High-Current, 120 mV Operation, in IEDM, 2016.

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