Theory and Characterization of Canary Sensor SRAM for Dynamic VMIN Tracking

In this paper, we show the first silicon results of a working 512b canary SRAM using reverse assist in 130nm bulk technology which can be tuned to fail earlier than the 8Kb SRAM fails by tuning the bitline or wordline type reverse assists. We further show that this tuning is possible across voltage, frequency, and temperature variations. We report that the 512b canary SRAM has 60% less power consumption than the 8Kb SRAM at 100MHz.

In this paper, we investigate a reverse write assist circuit scheme that enables the tracking of SRAM write VMIN by using canary SRAM bitcells to track dynamic voltage, temperature fluctuations and aging effects. This circuit ultimately allows us to lower the write VMIN below the worst case corner (SF_85C) VMIN, which saves a minimum of 30.7% energy per cycle at the SS_85C, and a maximum of 51.5% energy per cycle at the FS_85C corner.