Projects
Recent Publications
- A Batteryless 19 uW MICS/ISM-Band Energy Harvesting Body Sensor Node SoC for ExG Applications
- Leveraging Sensitivity Analysis for Fast, Accurate Estimation of SRAM Dynamic VMIN
- Virtual Prototyping (ViPro) Tool for Memory Subsystem Design Exploration and Optimization
- A 0.6V 8 pJ/write Non-Volatile CBRAM Macro Embedded in a Body Sensor Node for Ultra Low Energy Applications
- A Digital Auto-Zeroing Circuit to Reduce Offset in Sub-threshold Sense Amplifiers
- A 50nW, 100kbps Clock/Data Recovery Circuit in an FSK RF Receiver on a Body Sensor Node
RLP VLSI
The Robust Low Power VLSI Group, led by Professor Ben Calhoun, investigates research topics related to modern VLSI design. Among the many challenges facing circuit designers in deep sub-micron technologies, power and variation are perhaps the most critical. Our group's focus is to confront these problems in a range of applications and different regions of the design space. Our specific research interests include low power digital circuit design, sub-threshold digital circuits, SRAM design for end-of-the-roadmap silicon, variation tolerant circuit design methodologies, and medical applications for low energy electronics. The group is engaged in projects related to each of these topics.
