Projects

Ultra low power (ULP) miniature devices are enabling a new generation of applications for areas such as healthcare and wireless environmental control. Reconfigurable circuits, designed for low-power operation, promise to make ubiquitous implementation of these systems possible by providing a combination of adequate computing capability...

Virtual Prototyper (ViPro) - enables iterative SRAM design space exploration to facilitate optimal, sub-45nm SRAM designs. SRAM component circuits (e.g. decoder, SA etc.) are characterized in terms of energy and delay. This data is plugged into an SRAM model to generate an optimal, base-case SRAM prototype for any technology. Through an...

The Advanced Self-Powered Systems of Integrated Sensors and Technologies (ASSIST) Center is a new NSF Nanosystems Engineering Research Center (NERC) that will develop and employ nano-enabled energy harvesting, energy storage, nanodevices and sensors to create innovative battery-free, body...

Panoptic Dynamic Voltage Scaling (PDVS) is an exciting approach to ultra low power (ULP) design to reduce energy without sacrificing performance. The objective of PDVS is to dynamically scale energy of a digital circuit to meet real-time energy constraints and thus extend battery life. Consumers demand longer battery life. Some batteries in remote...

RLP VLSI

The Robust Low Power VLSI Group, led by Professor Ben Calhoun, investigates research topics related to modern VLSI design. Among the many challenges facing circuit designers in deep sub-micron technologies, power and variation are perhaps the most critical. Our group's focus is to confront these problems in a range of applications and different regions of the design space. Our specific research interests include low power digital circuit design, sub-threshold digital circuits, SRAM design for end-of-the-roadmap silicon, variation tolerant circuit design methodologies, and medical applications for low energy electronics. The group is engaged in projects related to each of these topics.