Robust Low Power VLSI
VLSI Design Group

Navigation

Search This Site

Publications

Export 60 results:
Author Title Type [ Year(Desc)]
Filters: First Letter Of Last Name is C and Author is B. H. Calhoun  [Clear All Filters]
2008
J. Wang, Nalam, S., and Calhoun, B. H., “Analyzing Static and Dynamic Write Margin for Nanometer SRAMs”, in International Symposium on Low Power Electronics and Design, 2008, pp. 129-134.
2009
S. Nalam and Calhoun, B. H., “Asymmetric Sizing in a 45nm 5T SRAM to Improve Read Stability over 6T”, in CICC, 2009, pp. 709-712.
M. A. Hanson, Jr, H. C. Powell, Barth, A. T., Ringgenberg, K., Calhoun, B. H., Aylor, J. H., and Lach, J., “Body Area Sensor Networks: Challenges and Opportunities”, Computer, vol. 42, pp. 58–65, 2009.
M. Bhargava, Nalam, S., Calhoun, B. H., and Mai, K., “An SRAM Prototyping Tool for Rapid Sub-32nm Design Exploration and Optimization”, in TECHCON, 2009.
B. H. Calhoun, Khanna, S., Mann, R., and Wang, J., “Sub-threshold Circuit Design with Shrinking CMOS Devices”, in International Symposium on Circuits and Systems, 2009.
S. Nalam, Bhargava, M., Ringgenberg, K., Mai, K., and Calhoun, B. H., “A Technology-Agnostic Simulation Environment (TASE) for Iterative Custom IC Design across Processes”, in ICCD, 2009, pp. 523-528.
2010
S. Nalam, Chandra, V., Pietrzyk, C., Aitken, R. C., and Calhoun, B. H., “Asymmetric 6T SRAM with Two-phase Write and Split Bitline Differential Sensing for Low Voltage Operation”, in ISQED, 2010, pp. 139-146.
J. B. Stocking, Eberhardt, W. C., Shakhsheer, Y. A., Paulus, J. R., Appleby, M., and Calhoun, B. H., “A Capacitance-Based Whisker-like Artificial Sensor for Fluid Motion Sensing”, in IEEE Sensors, 2010.
R. W. Mann, Wang, J., Nalam, S., Khanna, S., Braceras, G., Pilo, H., and Calhoun, B. H., “Impact of circuit assist methods on margin and performance in 6T SRAM”, Journal of Solid State Electronics, vol. 54, pp. 1398-1407, 2010.
J. Wang, Nalam, S., Qi, J., Mann, R. W., Stan, M., and Calhoun, B. H., “Improving SRAM Vmin and Yield by Using Variation-Aware BTI Stress”, in CICC, San Jose, CA, 2010.
B. H. Calhoun, Arrabi, S., Khanna, S., Shakhsheer, Y., Craig, K., Ryan, J., and Lach, J., “REESES: Rapid Efficient Energy Scalable ElectronicS”, in GOMAC Tech, 2010.
S. Nalam, Bhargava, M., Mai, K., and Calhoun, B. H., “Virtual Prototyper (ViPro): An Early Design Space Exploration and Optimization Tool for SRAM Designers”, in Design Automation Conference (DAC), 2010, pp. 138-143.
2011
Y. Shakhsheer, Khanna, S., Craig, K., Arrabi, S., Lach, J., and Calhoun, B. H., “A 90nm Data Flow Processor Demonstrating Fine Grained DVS for Energy Efficient Operation from 0.25V to 1.2V”, in Custom Integrated Circuits Conference, San Jose, 2011.
J. F. Ryan, Khanna, S., and Calhoun, B. H., “An Analytical Model for Performance Yield of Nanoscale SRAM Accounting for the Sense Amplifier Strobe Signal”, in Internation Symposium on Lower Power Electronics and Design (ISLPED), 2011.
J. Boley, Calhoun, B. H., and Wang, J., “Analyzing Subthreshold Bitcell Topologies and the Effects of Assist Methods on SRAM Vmin”. 2011.
W. C. Eberhardt, Shakhsheer, Y. A., and Calhoun, B. H., “A Bio-Inspired Artificial Whisker for Fluid Motion Sensing with Increased Sensitivity and Reliability”, in IEEE Sensors, Limrick, Ireland, 2011.
B. H. Meyer, Calhoun, B. H., Lach, J. C., and Skadron, K., “Cost-effective Safety and Fault Localization using Distributed Temporal Redundancy”, CASES. 2011.
S. Nalam, Chandra, V., Aitken, R. C., and Calhoun, B. H., “Dynamic Write Limited Minimum Operating Voltage for Nanoscale SRAM”, in Design Automation and Test Europe (DATE), 2011.
J. Wang and Calhoun, B. H., “Minimum Supply Voltage and Yield Estimation for Large SRAMs Under Parametric Variations”, Transactions on VLSI Systems (TVLSI), 2011.
R. W. Mann, Hook, T. B., Nguyen, P., and Calhoun, B. H., “Non-Random Device Mismatch Considerations in Nanoscale SRAM”, IEEE Transactions of VLSI Systems (TVLSI), 2011.
A. M. Klinefelter and Calhoun, B. H., “A Programmable Multi-channel Sub-threshold FIR Filter for a Body Area Sensor Node”. 2011.
B. H. Meyer, Skadron, K., George, N., Calhoun, B. H., and Lach, J., “Reducing the Cost of Redundant Execution in Safety-Critical Systems using Relaxed Dedication”, in Design Automation and Test in Europe (DATE), 2011.
Y. Yu, Huang, J., Khanna, S., Calhoun, B. H., Lach, J., Shelat, A., and Evans, D., “A Sub-0.5V Lattice-Based Public-Key Encryption Scheme for RFID Platforms in 130nm”. 2011 Workshop on RFID Security, 2011.
S. N. Wooters, Cabe, A. C., Qi, Z., Wang, J., Mann, R. W., Calhoun, B. H., Stan, M. R., and Blalock, T. N., “Tracking On-Chip Age Using Distributed, Embedded Sensors”, Transactions on VLSI Systems (TVLSI), 2011.
B. H. Calhoun and Lach, J., “What is a Body Sensor Network?”, ACM / SIGDA Newsletter, vol. 41, 2011.

Pages