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Journal Article
A. Mallick, Bashar, M. K., Truesdell, D. S., Calhoun, B. H., Joshi, S., and Shukla, N., Using synchronized oscillators to compute the maximum independent set, Nature Communications, 2020.
D. S. Truesdell and Calhoun, B. H., A Single-Supply 6-Transistor Voltage Level Converter Design Reaching 8.18-fJ/Transition at 0.3-1.2-V Range or 44-fW Leakage at 0.8-2.5-V Range, IEEE Solid-State Circuits Letters (SSCL), 2020.PDF icon A Single-Supply 6-Transistor Voltage Level Converter Design Reaching 8.18-fJ_Transition at 0.3-1.2-V Range or 44-fW Leakage at 0.8-2.5-V Range.pdf (1.06 MB)
S. Z. Ahmed, Tan, Y., Truesdell, D. S., Calhoun, B. H., and Ghosh, A., Modeling tunnel field effect transistors-from interface chemistry to non-idealities to circuit level performance, Journal of Applied Physics, 2018.
S. Z. Ahmed, Tan, Y., Truesdell, D. S., Calhoun, B. H., and Ghosh, A., Modeling tunnel field effect transistors-from interface chemistry to non-idealities to circuit level performance, Journal of Applied Physics, 2018.
D. S. Truesdell, Ahmed, S. Z., Ghosh, A. W., and Calhoun, B. H., Minimum-Energy Digital Computing with Steep Subthreshold Swing Tunnel FETs, IEEE Journal of Exploratory Solid-State Computational Devices and Circuits (JxCDC), 2020.PDF icon Minimum-Energy Digital Computing With Steep Subthreshold Swing Tunnel FETs.pdf (1.02 MB)
J. Moody, Dissanayake, A., Bishop, H. L., Lu, R., Liu, N. X., Duvvuri, D., Gao, A., Truesdell, D. S., N. Barker, S., Gong, S., Calhoun, B. H., and Bowers, S. M., A Highly Re-configurable Bit-level Duty Cycled TRF Receiver Achieving -106 dBm Sensitivity and 33 nW Average Power Consumption, IEEE Solid-State Circuits Letters (SSCL), Special Issue on VLSI (invited paper), 2019.
V. Misra, Bozkurt, A., Calhoun, B., Jackson, T., Jur, J., Lach, J., Lee, B., Muth, J., Oralkan, O., Ozturk, M., Trolier-McKinstry, S., Vashaee, D., Wentzloff, D., and Zhu, Y., Flexible Technologies for Self-Powered Wearable Health and Environmental Sensing, Proceedings of the IEEE, vol. 103, pp. 665-681, 2015.
X. Chen, Alghaihab, A., Shi, Y., Truesdell, D. S., Calhoun, B. H., and Wentzloff, D. D., A Crystal-Less BLE Transmitter with Clock Recovery from GFSK-Modulated BLE Packets, IEEE Journal of Solid-State Circuits, 2021.
S. Z. Ahmed, Truesdell, D. S., Tan, Y., Calhoun, B. H., and Ghosh, A. W., A comprehensive analysis of Auger generation impacted planar Tunnel FETs, Solid-State Electronics, 2020.
S. Z. Ahmed, Truesdell, D. S., Tan, Y., Calhoun, B. H., and Ghosh, A. W., A comprehensive analysis of Auger generation impacted planar Tunnel FETs, Solid-State Electronics, 2020.
D. S. Truesdell, Breiholz, J., Kamineni, S., Liu, N. X., Magyar, A., and Calhoun, B. H., A 6–140-nW 11 Hz–8.2-kHz DVFS RISC-V Microprocessor Using Scalable Dynamic Leakage-Suppression Logic, IEEE Solid-State Circuits Letters (SSCL), 2019.PDF icon A 6–140-nW 11 Hz–8.2-kHz DVFS RISC-V Microprocessor Using Scalable Dynamic Leakage-Suppression Logic (1.63 MB)
N. X. Liu, Agarwala, R., Dissanayake, A., Truesdell, D. S., Kamineni, S., and Calhoun, B. H., A 2.5 ppm/°C 1.05 MHz Relaxation Oscillator with Dynamic Frequency-Error Compensation and Fast Start-Up Time, IEEE Journal of Solid-State Circuits (JSSC), 2019.
D. S. Truesdell, Dissanayake, A., and Calhoun, B. H., A 0.6-V 44.6-fJ/Cycle Energy-Optimized Frequency-Locked Loop in 65-nm CMOS With 20.3-ppm/°C Stability, IEEE Solid-State Circuits Letters (SSCL), 2019.PDF icon A 0.6-V 44.6-fJ Cycle Energy-Optimized Frequency-Locked Loop in 65-nm CMOS With 20.3-ppm C Stability.pdf (1.64 MB)
D. S. Truesdell, Li, S., and Calhoun, B. H., A 0.5V 560-kHz 18.8-fJ/Cycle On-Chip Oscillator with 96.1-ppm/°C Steady-State Stability Using a Duty-Cycled Digital Frequency-Locked Loop, IEEE Journal of Solid-State Circuits, 2021.PDF icon A 0.5-V 560-kHz 18.8-fJ_Cycle On-Chip Oscillator With 96.1ppm_C Steady-State Stability Using a Duty-Cycled Digital Frequency-Locked Loop.pdf (2.95 MB)
Conference Paper
P. Bassirian, Duvvuri, D., Truesdell, D. S., Liu, N. X., Calhoun, B. H., and Bowers, S. M., A Temperature-robust 27.6nW -65dBm Wakeup Receiver at 9.6GHz X Band, in 2020 IEEE International Solid-State Circuits Conference (ISSCC), 2020.
D. S. Truesdell, Liu, X., Breiholz, J., Gupta, S., Li, S., and Calhoun, B. H., NanoWattch: A Self-Powered 3-nW RISC-V SoC Operable from 160mV Photovoltaic Input with Integrated Temperature Sensing and Adaptive Performance Scaling, in 2022 IEEE Symposium on VLSI Circuits (VLSI), (Equally-Credited Authors), 2022.PDF icon NanoWattch A Self-Powered 3-nW RISC-V SoC Operable from 160mV Photovoltaic Input with Integrated Temperature Sensing and Adaptive Performance Scaling.pdf (11.11 MB)
D. S. Truesdell and Calhoun, B. H., Improving Dynamic Leakage Suppression Logic with Forward Body Bias in 65nm CMOS, in IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2019.
A. Mallick, Bashar, M. Khairul, Truesdell, D. S., Calhoun, B. H., Joshi, S., and Shukla, N., Graph Coloring using Coupled Oscillator-based Dynamical Systems, in 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021.
A. Klinefelter, Ryan, J., Tschanz, J., and Calhoun, B. H., Error-Energy Analysis of Hardware Logarithmic Approximation Methods for Low Power Applications, in International Symposium on Circuits and Systems (ISCAS), 2015.
A. Alghaihab, Chen, X., Shi, Y., Truesdell, D. S., Calhoun, B. H., and Wentzloff, D. D., A Crystal-Less BLE Transmitter with -86dBm Frequency-Hopping Back-Channel WRX and Over-the-Air Clock Recovery from a GFSK-Modulated BLE Packet, in 2020 IEEE International Solid-State Circuits Conference (ISSCC), 2020.
D. S. Truesdell and Calhoun, B. H., Channel Length Sizing for Power Minimization in Leakage-Dominated Digital Circuits, in IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2018.
S. Z. Ahmed, Tan, Y., Truesdell, D. S., and Ghosh, A., Auger Effect Limited Performance in Tunnel Field Effect Transistors, in 5th Berkeley Symposium on Energy Efficient Electronics & Steep Transistors Workshop, Berkeley, CA, 2017.
S. Z. Ahmed, Tan, Y., Truesdell, D. S., and Ghosh, A., Auger Effect Limited Performance in Tunnel Field Effect Transistors, in 5th Berkeley Symposium on Energy Efficient Electronics & Steep Transistors Workshop, Berkeley, CA, 2017.
R. Agarwala, Wang, P., Tanneeru, A., Lee, B., Misra, V., and Calhoun, B. H., An 88.6nW Ozone Pollutant Sensing Interface IC with a 159 dB Dynamic Range, in ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), 2020.
S. Gupta, Truesdell, D. S., and Calhoun, B. H., A 65nm 16kb SRAM with 131.5pW Leakage at 0.9V for Wireless IoT Sensor Nodes, in 2020 IEEE Symposium on VLSI Circuits (VLSI), 2020.PDF icon A 65nm 16kb SRAM with 131.5pW Leakage at 0.9V for Wireless IoT Sensor Nodes.pdf (935.56 KB)

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