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Conference Paper
A. Banerjee, Liu, N., Patel, H. N., and Calhoun, B. H., A 256kb 6T self-tuning SRAM with extended 0.38V–1.2V operating range using multiple read/write assists and VMIN tracking canary sensors, in 2017 IEEE Custom Integrated Circuits Conference (CICC), Austin, TX, 2017, 2017.
A. Banerjee, Liu, N., Patel, H. N., and Calhoun, B. H., A 256kb 6T self-tuning SRAM with extended 0.38V–1.2V operating range using multiple read/write assists and VMIN tracking canary sensors, in 2017 IEEE Custom Integrated Circuits Conference (CICC), Austin, TX, 2017, 2017.
X. Liu, Truesdell, D. S., Faruqe, O., Parameswaran, L., Rickley, M., Kopanski, A., Cantley, L., Coon, A., Bernasconi, M., Wang, T., and Calhoun, B. H., A 33nW Fully Autonomous SoC with Distributed Cooperative Energy Harvesting and Multi-Chip Power Management for mm-scale System-in-Fiber, in IEEE Transactions on Biomedical Circuits and Systems, Invited paper, 2023.PDF icon A_33nW_Fully_Autonomous_SoC_with_Distributed_Cooperative_Energy_Harvesting_and_Multi-Chip_Power_Management_for_mm-scale_System-in-Fiber.pdf (16.09 MB)
A. Shrivastava, Pandey, J., Otis, B., and Calhoun, B. H., A 50nW, 100kbps Clock/Data Recovery Circuit in an FSK RF Receiver on a Body Sensor Node, in VLSI Design Conference, 2013.
H. N. Patel, Roy, A., Yahya, F. B., Liu, N., Kumeno, K., Yasuda, M., Harada, A., Ema, T., and Calhoun, B. H., A 55nm Ultra Low Leakage Deeply Depleted Channel Technology Optimized for Energy Minimization in Subthreshold SRAM and Logic, in European Solid State Circuits Conference (ESSCIRC), 2016.
J. Moody, Bassirian, P., Roy, A., Liu, N. X., Pancrazio, S., N. Barker, S., Calhoun, B. H., and Bowers, S. M., A -76dBm 7.4 nW wakeup radio with automatic offset compensation, in International Solid-State Circuits Conference (ISSCC), 2018.
S. Nalam, Chandra, V., Pietrzyk, C., Aitken, R. C., and Calhoun, B. H., Asymmetric 6T SRAM with Two-phase Write and Split Bitline Differential Sensing for Low Voltage Operation, in ISQED, 2010, pp. 139-146.
F. Zhang, Zhang, Y., Silver, J., Shakhsheer, Y., Nagaraju, M., Klinefelter, A., Pandey, J., Boley, J., Carlson, E., Shrivastava, A., Otis, B., and Calhoun, B., A Batteryless 19uW MICS/ISM-Band Energy Harvesting Body Area Sensor Node SoC, in ISSCC, San Francisco, 2012.
F. Yahya, Lukas, C. J., Breiholz, J., Roy, A., Patel, H. N., Liu, N. X., Chen, X., Kosari, A., Li, S., Akella, D., Ayorinde, O., Wentzloff, D. D., and Calhoun, B. H., A battery-less 507nW SoC with integrated platform power manager and SiP interfaces, in 2017 Symposium on VLSI Circuits, Kyoto, Japan, 2017.
J. B. Stocking, Eberhardt, W. C., Shakhsheer, Y. A., Paulus, J. R., Appleby, M., and Calhoun, B. H., A Capacitance-Based Whisker-like Artificial Sensor for Fluid Motion Sensing, in IEEE Sensors, 2010.
F. B. Yahya, Patel, H. N., Chandra, V., and Calhoun, B. H., Combining SRAM Read/Write Assist Techniques for Near/Sub-Threshold Voltage Operation, in 6th Asia Symposium on Quality Electronic Design (ASQED 2015), Kuala Lumpur, Malaysia, 2015.
H. Patel, Yahya, F., and Calhoun, B. H., Improving Reliability and Energy Requirements of Memory in Body Sensor Networks., in International Conference on VLSI Design, Kolkata, India, 2016.
H. Patel, Yahya, F., and Calhoun, B., Optimizing SRAM Bitcell Reliability and Energy for IoT Applications, in International Symposium on Quality Electronic Design (ISQED), Santa Clara, CA, 2016.
M. Putic, Di, L., Calhoun, B. H., and Lach, andJohn, Panoptic DVS: A Fine-Grained Dynamic Voltage Scaling Framework for Energy Scalable CMOS Design, in International Conference on Computer Design (ICCD), 2009, pp. 491-497.
D. Akella Kamakshi, Guo, X., Patel, H. N., Stan, M. R., and Calhoun, B. H., A post-silicon hold time closure technique using data-path tunable-buffers for variation-tolerance in sub-threshold designs, in 19th International Symposium on Quality Electronic Design (ISQED), 2018.
L. Di, Putic, M., Lach, J., and Calhoun, B. H., Power Switch Characterization for Fine-Grained Dynamic Voltage Scaling, in International Conference on Computer Design, pages 605-611, 2008.
A. Banerjee, Sinangil, M., Poulton, J., Gray, C. T., and Calhoun, B. H., A Reverse Write Assist Circuit for SRAM Dynamic Write VMIN Tracking using Canary SRAMs, in International Symposium on Quality Electronic Design (ISQED), 2014.
X. Liu, Truesdell, D. S., Faruqe, O., Parameswaran, L., Rickley, M., Kopanski, A., Cantley, L., Coon, A., Bernasconi, M., Wang, T., and Calhoun, B. H., A Self-Powered SoC with Distributed Cooperative Energy Harvesting and Multi-Chip Power Management for System-in-Fiber, in IEEE International Solid-State Circuits Conference (ISSCC), 2023.PDF icon 15.1_A_Self-Powered_SoC_with_Distributed_Cooperative_Energy_Harvesting_and_Multi-Chip_Power_Management_for_System-in-Fiber.pdf (1.51 MB)
H. N. Patel, Mann, R. W., and Calhoun, B. H., Soft Errors: Reliability Challenges in Energy-Constrained ULP Body Sensor Networks Applications, in 23rd IEEE International Symposium on On-Line Testing and Robust System Design, Thessaloniki, Greece, 2017.
H. N. Patel, Yahya, F. B., and Calhoun, B. H., Subthreshold SRAM: Challenges, Design Decisions, and Solutions, in 60th IEEE International Midwest Symposium on Circuits and Systems, Boston, MA, USA, 2017.
P. Long, Huang, J. Z., Povolotskyi, M., Verreck, D., Charles, J., Kubis, T., Klimeck, G., Rodwell, M. J. W., and Calhoun, B. H., A Tunnel FET Design for High-Current, 120 mV Operation, in IEDM, 2016.

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