Robust Low Power VLSI

VLSI Design Group

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Miscellaneous

Y. Yu, Huang, J., Khanna, S., Calhoun, B. H., Lach, J., Shelat, A., and Evans, D., “A Sub-0.5V Lattice-Based Public-Key Encryption Scheme for RFID Platforms in 130nm”. 2011 Workshop on RFID Security, 2011.

A. M. Klinefelter and Calhoun, B. H., “A Programmable Multi-channel Sub-threshold FIR Filter for a Body Area Sensor Node”. 2011.

Journal Article

X. Liu, Kamineni, S., Breiholz, J., Calhoun, B. H., and Li, S., “A Sub-µW Energy-Performance-Aware IoT SoC with a Triple-Mode Power Management Unit for System Performance Scaling, Fast DVFS, and Energy Minimization”, IEEE Journal of Solid-State Circuits, 2024.

A_Sub-_mu_W_Energy-Performance-Aware_IoT_SoC_With_a_Triple_Mode_Power_Management_Unit_for_System_Performance_Scaling_Fast_DVFS_and_Energy_Minimization.pdf (7.38 MB)

A. Klinefelter, Zhang, Y., Otis, B., and Calhoun, B. H., “A Programmable 34 nW/Channel Sub-Threshold Signal Band Power Extractor on a Body Sensor Node SoC”, Circuits and Systems II: Express Briefs, IEEE Transactions on, vol. 59, p. 941, 2012.

R. W. Mann, Wang, J., Nalam, S., Khanna, S., Braceras, G., Pilo, H., and Calhoun, B. H., “Impact of circuit assist methods on margin and performance in 6T SRAM”, Journal of Solid State Electronics, vol. 54, pp. 1398-1407, 2010.

B. H. Calhoun, Ryan, J., Khanna, S., Putic, M., and Lach, J., “Flexible Circuits and Architectures for Ultra Low Power”, Proceedings of the IEEE, vol. 98, pp. 267-282, 2010.

A. Alghaihab, Shi, Y., Breiholz, J., Kim, H. - S., Calhoun, B. H., and Wentzloff, D. D., “Enhanced Interference Rejection Bluetooth Low-Energy Back-Channel Receiver With LO Frequency Hopping”, IEEE Journal of Solid-State Circuits, 2019.

Y. Zhang, Zhang, F., Shakhsheer, Y., Silver, J. D., Klinefelter, A., Nagaraju, M., Boley, J., Pandey, J., Shrivastava, A., Carlson, E. J., Wood, A., Calhoun, B. H., and Otis, B. P., “A Batteryless 19 uW MICS/ISM-Band Energy Harvesting Body Sensor Node SoC for ExG Applications”, Journal of Solid State Circuits, vol. 48, pp. 199-213, 2013.

X. Chen, Breiholz, J., Yahya, F. B., Lukas, C. J., Kim, H. - S., Calhoun, B. H., and Wentzloff, D. D., “Analysis and Design of an Ultra-Low-Power Bluetooth Low-Energy Transmitter With Ring Oscillator-Based ADPLL and 4 Frequency Edge Combiner”, IEEE Journal of Solid-State Circuits, 2019.

D. S. Truesdell, Breiholz, J., Kamineni, S., Liu, N. X., Magyar, A., and Calhoun, B. H., “A 6–140-nW 11 Hz–8.2-kHz DVFS RISC-V Microprocessor Using Scalable Dynamic Leakage-Suppression Logic”, IEEE Solid-State Circuits Letters (SSCL), 2019.

A 6–140-nW 11 Hz–8.2-kHz DVFS RISC-V Microprocessor Using Scalable Dynamic Leakage-Suppression Logic (1.63 MB)

A. Roy, Klinefelter, A., Yahya, F., Chen, X., Gonzalez, P., Lukas, C. J., Akella, D., Boley, J., Craig, K., Faisal, M., Oh, S., Roberts, N., Shakhsheer, Y., Shrivastava, A., Vasudevan, D., Wentzloff, D. D., and Calhoun, B., “A 6.45μW Self-Powered SoC with Integrated Energy-Harvesting Power Management and ULP Asymmetric Radios for Portable Biomedical Systems”, IEEE Transactions on Biomedical Circuits and Systems, vol. 9, pp. 862-874, 2015.

K. Craig, Shakhsheer, Y., Arrabi, S., Khanna, S., Lach, J., and Calhoun, B. H., “A 32b 90nm Processor Implementing Panoptic DVS Achieving Energy Efficient Operation from Sub-threshold to High Performance”, Journal of Solid State Circuits, 2014.

N. X. Liu, Agarwala, R., Dissanayake, A., Truesdell, D. S., Kamineni, S., and Calhoun, B. H., “A 2.5 ppm/°C 1.05 MHz Relaxation Oscillator with Dynamic Frequency-Error Compensation and Fast Start-Up Time”, IEEE Journal of Solid-State Circuits (JSSC), 2019.

A. Shrivastava, Roberts, N. E., Khan, O. U., Wentzloff, D. D., and Calhoun, B. H., “A 10mV-Input Boost Converter with Inductor Peak Current Control and Zero Detection for Thermoelectric and Solar Energy Harvesting with 220mV Cold-Start and -14.5dBm, 915MHz RF Kick-Start”, IEEE Journal of Solid-State Circuits (JSSC), vol. 50, pp. 1820-1832, 2015.

C. J. Lukas, Yahya, F. B., Breiholz, J., Roy, A., Chen, X., Patel, H. N., Liu, N. X., Kosari, A., Li, S., Kamakshi, D. Akella, Ayorinde, O., Wentzloff, D. D., and Calhoun, B. H., “A 1.02 μW Battery-Less, Continuous Sensing and Post-Processing SiP for Wearable Applications”, IEEE Transactions on Biomedical Circuits and Systems, 2019.

08625544.pdf (3.22 MB)

C. J. Lukas, Yahya, F. B., Breiholz, J., Roy, A., Chen, X., Patel, H. N., Liu, N. X., Kosari, A., Li, S., Kamakshi, D. Akella, Ayorinde, O., Wentzloff, D. D., and Calhoun, B. H., “A 1.02 μW Battery-Less, Continuous Sensing and Post-Processing SiP for Wearable Applications”, IEEE Transactions on Biomedical Circuits and Systems, 2019.

08625544.pdf (3.22 MB)

A. Kosari, Breiholz, J., Liu, N. X., Calhoun, B. H., and Wentzloff, D. D., “A 0.5 V 68 nW ECG Monitoring Analog Front-End for Arrhythmia Diagnosis”, Journal of Low Power Electronics and Applications (JLPEA), 2018.

A. D. Kamakshi, Shrivastava, A., and Calhoun, B. H., “A 0.2 V, 23 nW CMOS Temperature Sensor for Ultra-Low-Power IoT Applications”, J. Low Power Electron. Appl. (JLPEA), vol. 6, 2016.

Conference Proceedings

A. Banerjee, Kamineni, S., and Calhoun, B. H., “Multiple Combined Write-Read Peripheral Assists in 6T FinFET SRAMs for Low-VMIN IoT and Cognitive Applications”, Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED). IEEE, 2018.

T. Ajayi, Cherivirala, Y. K., Kwon, K., Kamineni, S., Saligane, M., Fayazi, M., Gupta, S., Chen, C. - H., Sylvester, D., Blaauw, D., Dreslinski, Jr, R., Calhoun, B. H., and Wentzloff, D. D., “Fully Autonomous Mixed Signal SoC Design & Layout Generation Platform”, IEEE Hot Chips 32 Symposium (HCS). 2020.

T. Ajayi, Cherivirala, Y. K., Kwon, K., Kamineni, S., Saligane, M., Fayazi, M., Gupta, S., Chen, C. - H., Sylvester, D., Blaauw, D., Dreslinski, Jr, R., Calhoun, B. H., and Wentzloff, D. D., “Fully Autonomous Mixed Signal SoC Design & Layout Generation Platform”, IEEE Hot Chips 32 Symposium (HCS). 2020.

Conference Paper

A. Wang, Calhoun, B. H., Verma, N., Kwong, J., and Chandrakasan, A., “Ultra-Dynamic Voltage Scaling for Energy Starved Electronics”, in Proc. of GOMAC Tech, 2007.

P. Long, Huang, J. Z., Povolotskyi, M., Verreck, D., Charles, J., Kubis, T., Klimeck, G., Rodwell, M. J. W., and Calhoun, B. H., “A Tunnel FET Design for High-Current, 120 mV Operation”, in IEDM, 2016.

P. Long, Huang, J. Z., Povolotskyi, M., Verreck, D., Charles, J., Kubis, T., Klimeck, G., Rodwell, M. J. W., and Calhoun, B. H., “A Tunnel FET Design for High-Current, 120 mV Operation”, in IEDM, 2016.

B. H. Calhoun, Khanna, S., Zhang, Y., Ryan, J., and Otis, B., “System Design Principles Combining Sub-threshold Circuits and Architectures with Energy Scavening Mechanisms”, in International Symposium on Circuits and Systems (ISCAS), Paris, France, 2010, pp. 269-272.

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