Robust Low Power VLSI
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Author Title [ Type(Desc)] Year
Filters: First Letter Of Last Name is D and Author is Liang Di  [Clear All Filters]
Conference Paper
M. Putic, Di, L., Calhoun, B. H., and Lach, andJohn, “Panoptic DVS: A Fine-Grained Dynamic Voltage Scaling Framework for Energy Scalable CMOS Design”, in International Conference on Computer Design (ICCD), 2009, pp. 491-497.
L. Di, Putic, M., Lach, J., and Calhoun, B. H., “Power Switch Characterization for Fine-Grained Dynamic Voltage Scaling”, in International Conference on Computer Design, pages 605-611, 2008.