VLSI Design Group

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Journal Article
B. H. Calhoun and Lach, J., What is a Body Sensor Network?, ACM / SIGDA Newsletter, vol. 41, 2011.
J. Boley, Beshay, P., and Calhoun, B. H., Virtual Prototyper (ViPro): An SRAM Design Tool for Yield Constrained Optimization, Transactions of Very Large Scale Integration Systems, 2015.
A. Mallick, Bashar, M. K., Truesdell, D. S., Calhoun, B. H., Joshi, S., and Shukla, N., Using synchronized oscillators to compute the maximum independent set, Nature Communications, 2020.
A. Banerjee and Calhoun, B. H., An Ultra-Low Energy Subthreshold SRAM Bitcell for Energy Constrained Biomedical Applications, Journal of Low Power Electronics and Applications (JLPEA), vol. 4, p. 19, 2014.
B. H. Calhoun and Chandrakasan, A., Ultra-Dynamic Voltage Scaling (UDVS) Using Sub-threshold Operation and Local Voltage Dithering, IEEE Journal of Solid-State Circuits (JSSC), vol. 41, pp. 238-245, 2006.
J. Wang, Singhee, A., Rutenbar, R. A., and Calhoun, B. H., Two Fast Methods for Estimating the Minimum Standby Supply Voltage for Large SRAMs, Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 29, pp. 1908-1920, 2010.
S. N. Wooters, Cabe, A. C., Qi, Z., Wang, J., Mann, R. W., Calhoun, B. H., Stan, M. R., and Blalock, T. N., Tracking On-Chip Age Using Distributed, Embedded Sensors, Transactions on VLSI Systems (TVLSI), 2011.
S. N. Wooters, Cabe, A. C., Qi, Z., Wang, J., Mann, R. W., Calhoun, B. H., Stan, M. R., and Blalock, T. N., Tracking On-Chip Age Using Distributed, Embedded Sensors, Transactions on VLSI Systems (TVLSI), vol. 20, p. 12, 2012.
F. B. Yahya, Lukas, C. J., and Calhoun, B. H., A Top-Down Approach to Building Battery-Less Self-Powered Systems for the Internet-of-Things, Journal of Low Power Electronics & Applications, 2018.
J. Wang and Calhoun, B. H., Techniques to Extend Canary-based Standby VDD Scaling for SRAMs to 45nm and Beyond, IEEE Journal of Solid-State Circuits, vol. 43, pp. 2514-2523, 2008.
X. Liu, Kamineni, S., Breiholz, J., Calhoun, B. H., and Li, S., A Sub-µW Energy-Performance-Aware IoT SoC with a Triple-Mode Power Management Unit for System Performance Scaling, Fast DVFS, and Energy Minimization, IEEE Journal of Solid-State Circuits, 2024.PDF icon A_Sub-_mu_W_Energy-Performance-Aware_IoT_SoC_With_a_Triple_Mode_Power_Management_Unit_for_System_Performance_Scaling_Fast_DVFS_and_Energy_Minimization.pdf (7.38 MB)
F. Yahya, Patel, H., Boley, J., Banerjee, A., and Calhoun, B. H., A Sub-threshold 8T SRAM Macro with 12.29nW/KB Standby Power and 6.24 pJ/access for Battery-Less IoT SoCs, J. Low Power Electron. Appl. (JLPEA), vol. 6, 2016.
X. Liu, Calhoun, B. H., and Li, S., A Sub-nW 93% Peak Efficiency Buck Converter with Wide Dynamic Range, Fast DVFS, and Asynchronous Load-Transient Control, IEEE Journal of Solid-State Circuits, (invited paper), 2022.PDF icon A SubnW 93 Peak Efficiency Buck Converter With Wide Dynamic Range Fast DVFS and Asynchronous Load Transient Control.pdf (3.94 MB)
B. H. Calhoun and Chandrakasan, A., Static Noise Margin Variation for Sub-threshold SRAM in 65nm CMOS, IEEE Journal of Solid-State Circuits (JSSC), vol. 41, pp. 1673-1679, 2006.
B. H. Calhoun and Chandrakasan, A., Standby Power Reduction Using Dynamic Voltage Scaling and Flip-Flop Structures, IEEE Journal of Solid-State Circuits (JSSC), vol. 39, pp. 1504-1511, 2004.
D. S. Truesdell and Calhoun, B. H., A Single-Supply 6-Transistor Voltage Level Converter Design Reaching 8.18-fJ/Transition at 0.3-1.2-V Range or 44-fW Leakage at 0.8-2.5-V Range, IEEE Solid-State Circuits Letters (SSCL), 2020.PDF icon A Single-Supply 6-Transistor Voltage Level Converter Design Reaching 8.18-fJ_Transition at 0.3-1.2-V Range or 44-fW Leakage at 0.8-2.5-V Range.pdf (1.06 MB)
A. Klinefelter, Zhang, Y., Otis, B., and Calhoun, B. H., A Programmable 34 nW/Channel Sub-Threshold Signal Band Power Extractor on a Body Sensor Node SoC, Circuits and Systems II: Express Briefs, IEEE Transactions on, vol. 59, p. 941, 2012.
S. Li, Roy, A., and Calhoun, B. H., A Piezoelectric Energy-Harvesting System with Parallel-SSHI Rectifier and Integrated Maximum-Power-Point Tracking, IEEE Solid-State Circuits Letters (SSCL), Special Issue on VLSI (invited paper), 2019.
R. W. Mann, Hook, T. B., Nguyen, P., and Calhoun, B. H., Non-Random Device Mismatch Considerations in Nanoscale SRAM, IEEE Transactions of VLSI Systems (TVLSI), 2011.
P. Bassirian, Moody, J., Lu, R., Gao, A., Manzaneque, T., Roy, A., N Barker, S., Calhoun, B. H., Gong, S., and Bowers, S. M., Nanowatt-Level Wakeup Receiver Front Ends Using MEMS Resonators for Impedance Transformation, IEEE Transactions on Microwave Theory and Techniques, 2019.

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