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“An Ultra-low Power System On Chip Enabling DVS with SR Level Shifting Latches”, in IEEE International Symposium on Circuits and Systems (ISCAS), Florence, Italy, 2018.
, “An Ultra-Low-Power FPGA for IoT Applications”, in S3S 2017, 2017.
, “Using synchronized oscillators to compute the maximum independent set”, Nature Communications, 2020.
, “Virtual Prototyper (ViPro): An SRAM Design Tool for Yield Constrained Optimization”, Transactions of Very Large Scale Integration Systems, 2015.
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