VLSI Design Group

Navigation

Search This Site

Publications

Export 12 results:
Author Title [ Type(Asc)] Year
Filters: Author is John Lach  [Clear All Filters]
Conference Paper
B. H. Calhoun, Zhang, Y., Khanna, S., Craig, K., Shakhsheer, Y., and Lach, J., A Sub-Threshold FPGA: Energy-Efficient Reconfigurable Logic, in GOMAC Tech, 2011.
S. Khanna, Craig, K., Shakhsheer, Y., Arrabi, S., Lach, J., and Calhoun, B., Stepped Supply Voltage Switching for Energy Constrained Systems, in ISQED, 2011.
L. Szafaryn, Chen, J., Calhoun, B. H., Lach, J., Skadron, K., and Meyer, B. H., Reducing the Cost of Safety-Critical Systems with On-Demand Redundancy, in SRC Techcon, 2012.
K. Craig, Shakhsheer, Y., Khanna, S., Arrabi, S., Lach, J., Calhoun, B. H., and Kosonocky, S., A Programmable Resistive Power Grid for Post-Fabrication Flexibility and Energy Tradeoffs, in International Symposium on Low Power Electronics and Design, 2012.
L. Di, Putic, M., Lach, J., and Calhoun, B. H., Power Switch Characterization for Fine-Grained Dynamic Voltage Scaling, in International Conference on Computer Design, pages 605-611, 2008.
H. L. Bishop, Wang, P., Fan, D., Lach, J., and Calhoun, B. H., Lighting IoT Test Environment (LITE) Platform: Evaluating Light-Powered, Energy HarvestingEmbedded Systems, in Global Internet of Things Summit (GIoTS), 2018.
M. Guevara, Marino, M. D., Meng, J., Satyamoorthy, P., Szafaryn, L. G., Wu, P., Meyer, B., Skadron, K., Lach, J., and Calhoun, B. H., Exploiting Dynamically Changing Parallelism with a Reconfigurable Array of Homogeneous Sub-cores, in TECHCON, 2010.
A. Shrivastava, Lach, J., and Calhoun, B., A Charge Pump Based Receiver Circuit for a Voltage Scaled Interconnect, in International Symposium on Low Power Electronics and Design, 2012.