VLSI Design Group

Navigation

Search This Site

Publications

Export 2 results:
Author [ Title(Desc)] Type Year
Filters: Author is Yu Huang  [Clear All Filters]
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 
O
H. Qi, Ayorinde, O., Huang, Y., and Calhoun, B., Optimizing energy efficient low-swing interconnect for sub-threshold FPGAs, in 2015 25th International Conference on Field Programmable Logic and Applications (FPL), London, UK, 2015.
U
O. Ayorinde, Qi, H., Huang, Y., and Calhoun, B., Using island-style bi-directional intra-CLB routing in low-power FPGAs, in 25th International Conference on Field Programmable Logic and Applications (FPL), 2015.