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Conference Paper
E. Shih, Calhoun, B. H., Cho, S. - H., and Chandrakasan, A., Energy-Efficient Link Layer for Wireless Microsensor Networks, in IEEE Computer Society Workshop on VLSI, 2001, pp. 16-21.
H. Qi, Ayorinde, O., and Calhoun, B. H., An Energy-Efficient Near/Sub-Threshold FPGA Interconnect Architecture Using Dynamic Voltage Scaling and Power-Gating, in International Conference on Field-Programmable Technology (ICFPT 2016), Xi’an, China, 2016.
J. Wang and Calhoun, B. H., An Enhanced Adaptive Canary System for SRAM Standby Power Reduction, in TECHCON, 2008.
A. Klinefelter, Ryan, J., Tschanz, J., and Calhoun, B. H., Error-Energy Analysis of Hardware Logarithmic Approximation Methods for Low Power Applications, in International Symposium on Circuits and Systems (ISCAS), 2015.
M. Guevara, Marino, M. D., Meng, J., Satyamoorthy, P., Szafaryn, L. G., Wu, P., Meyer, B., Skadron, K., Lach, J., and Calhoun, B. H., Exploiting Dynamically Changing Parallelism with a Reconfigurable Array of Homogeneous Sub-cores, in TECHCON, 2010.
A. Roy and Calhoun, B., Exploring Circuit Robustness to Power Supply Variation in Low-Voltage Latch and Register-Based Digital Systems, in IEEE International Symposium on Circuits and Systems (ISCAS), Montreal, Canada, 2016.
F. B. Yahya, Lukas, C. J., and Calhoun, B. H., FAR: A 4.12uW Ferro-electric Auto-Recovery for Battery-less BSN SoCs, in 2017 IEEE Biomedical Circuits and Systems Conference (BioCAS), Turin, Italy, 2017.
Y. Zhang and Calhoun, B. H., Fast, Accurate Variation-Aware Path Timing Computation for Sub-threshold Circuits, in International Symposium on Quality Electronic Design (ISQED), 2014.
P. Sotiriadis, Franza, O., Bailey, D., Calhoun, B., Lin, D., and Chandrakasan, A., Fast Algorithm for Clock Grid Simulation, in European Solid State Circuits Conference (ESSCIRC), 2002, pp. 771-774.
P. Sotiriadis, Franza, O., Bailey, D., Calhoun, B., Lin, D., and Chandrakasan, A., Fast Algorithm for Clock Grid Simulation, in European Solid State Circuits Conference (ESSCIRC), 2002, pp. 771-774.
S. Arrabi, Moore, D., Wang, L., Skadron, K., and Calhoun, B. H., Flexibility and Circuit Overheads in Reconfigurable SIMD/MIMD Systems, in International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2014.
C. T. Murphy, W. Eberhardt, C., Calhoun, B. H., and Mann, D. A., Flow-induced Vibrations of Pinniped Vibrissae: Effects of Angular Orientation and Implications for Hydrodynamic Reception, in Conference on the Biology of Marine Mammals, 2011.
A. Mallick, Bashar, M. Khairul, Truesdell, D. S., Calhoun, B. H., Joshi, S., and Shukla, N., Graph Coloring using Coupled Oscillator-based Dynamical Systems, in 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021.
Y. Zhang and Calhoun, B. H., Hold Time Closure for Subthreshold Circuits Using a Two-Phase, Latch Based Timing Method, in S3S Conference, Monterey, California, 2013.
D. S. Truesdell and Calhoun, B. H., Improving Dynamic Leakage Suppression Logic with Forward Body Bias in 65nm CMOS, in IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2019.
H. Patel, Yahya, F., and Calhoun, B. H., Improving Reliability and Energy Requirements of Memory in Body Sensor Networks., in International Conference on VLSI Design, Kolkata, India, 2016.
J. Wang, Nalam, S., Qi, J., Mann, R. W., Stan, M., and Calhoun, B. H., Improving SRAM Vmin and Yield by Using Variation-Aware BTI Stress, in CICC, San Jose, CA, 2010.
H. L. Bishop*, Dissanayake*, A., Bowers, S. M., and Calhoun, B. H., An Integrated 2.4GHz -91.5dBm Sensitivity Within-Packet Duty-Cycled Wake-Up Receiver Achieving 2μW at 100ms Latency, in IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA (*Equally-Credited Authors), 2021.
J. J. Granacki, Calhoun, B. H., Dasu, A. R., Jagasivamani, M., McIlrath, L., and Fritze, M., LEDRA: A 3DIC Ultra-Low Power FPGA Architecture for DoD Applications, in GOMAC Tech, 2014.
J. Boley, Chandra, V., Aitken, R., and Calhoun, B., Leveraging Sensitivity Analysis for Fast, Accurate Estimation of SRAM Dynamic VMIN, in Design Automation and Test Europe, 2013.
J. Boley, Chandra, V., Aitken, R., and Calhoun, B., Leveraging Sensitivity Analysis for Fast, Accurate Estimation of SRAM Dynamic VMIN, in Design Automation and Test Europe, 2013.
H. L. Bishop, Wang, P., Fan, D., Lach, J., and Calhoun, B. H., Lighting IoT Test Environment (LITE) Platform: Evaluating Light-Powered, Energy HarvestingEmbedded Systems, in Global Internet of Things Summit (GIoTS), 2018.
O. Abdelatty, Bishop, H., Shi, Y., Chen, X., Alghaihab, A., Calhoun, B., and Wentzloff, D., A Low Power Bluetooth Low-Energy Transmitter with a 10.5nJ Startup-Energy Crystal Oscillator, in IEEE European Solid-State Circuits Conference (ESSCIRC), Cracow, Poland, 2019.
O. Abdelatty, Bishop, H., Shi, Y., Chen, X., Alghaihab, A., Calhoun, B., and Wentzloff, D., A Low Power Bluetooth Low-Energy Transmitter with a 10.5nJ Startup-Energy Crystal Oscillator, in IEEE European Solid-State Circuits Conference (ESSCIRC), Cracow, Poland, 2019.
S. Kamineni, Gupta, S., and Calhoun, B. H., MemGen: An Open-Source Framework for Autonomous Generation of Memory Macros, in IEEE Custom Integrated Circuits Conference (CICC), 2021.PDF icon kamineni2021.pdf (9.26 MB)

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