VLSI Design Group

Navigation

Search This Site

Publications

Export 110 results:
Author Title [ Type(Desc)] Year
Filters: First Letter Of Last Name is B  [Clear All Filters]
Journal Article
P. Bassirian, Moody, J., Lu, R., Gao, A., Manzaneque, T., Roy, A., N Barker, S., Calhoun, B. H., Gong, S., and Bowers, S. M., Nanowatt-Level Wakeup Receiver Front Ends Using MEMS Resonators for Impedance Transformation, IEEE Transactions on Microwave Theory and Techniques, 2019.
F. Yahya, Patel, H., Boley, J., Banerjee, A., and Calhoun, B. H., A Sub-threshold 8T SRAM Macro with 12.29nW/KB Standby Power and 6.24 pJ/access for Battery-Less IoT SoCs, J. Low Power Electron. Appl. (JLPEA), vol. 6, 2016.
F. Yahya, Patel, H., Boley, J., Banerjee, A., and Calhoun, B. H., A Sub-threshold 8T SRAM Macro with 12.29nW/KB Standby Power and 6.24 pJ/access for Battery-Less IoT SoCs, J. Low Power Electron. Appl. (JLPEA), vol. 6, 2016.
S. N. Wooters, Cabe, A. C., Qi, Z., Wang, J., Mann, R. W., Calhoun, B. H., Stan, M. R., and Blalock, T. N., Tracking On-Chip Age Using Distributed, Embedded Sensors, Transactions on VLSI Systems (TVLSI), vol. 20, p. 12, 2012.
S. N. Wooters, Cabe, A. C., Qi, Z., Wang, J., Mann, R. W., Calhoun, B. H., Stan, M. R., and Blalock, T. N., Tracking On-Chip Age Using Distributed, Embedded Sensors, Transactions on VLSI Systems (TVLSI), 2011.
A. Banerjee and Calhoun, B. H., An Ultra-Low Energy Subthreshold SRAM Bitcell for Energy Constrained Biomedical Applications, Journal of Low Power Electronics and Applications (JLPEA), vol. 4, p. 19, 2014.
A. Mallick, Bashar, M. K., Truesdell, D. S., Calhoun, B. H., Joshi, S., and Shukla, N., Using synchronized oscillators to compute the maximum independent set, Nature Communications, 2020.
J. Boley, Beshay, P., and Calhoun, B. H., Virtual Prototyper (ViPro): An SRAM Design Tool for Yield Constrained Optimization, Transactions of Very Large Scale Integration Systems, 2015.
J. Boley, Beshay, P., and Calhoun, B. H., Virtual Prototyper (ViPro): An SRAM Design Tool for Yield Constrained Optimization, Transactions of Very Large Scale Integration Systems, 2015.

Pages