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A. D. Kamakshi, Shrivastava, A., and Calhoun, B. H., A 0.2 V, 23 nW CMOS Temperature Sensor for Ultra-Low-Power IoT Applications, J. Low Power Electron. Appl. (JLPEA), vol. 6, 2016.
D. Kamakshi, Fojtik, M., Khailany, B., Kudva, S., Zhou, Y., and Calhoun, B. H., Modeling and Analysis of Power Supply Noise Tolerance with Fine-grained GALS Adaptive Clocks, in ASYNC, 2016.
D. Akella Kamakshi, Guo, X., Patel, H. N., Stan, M. R., and Calhoun, B. H., A post-silicon hold time closure technique using data-path tunable-buffers for variation-tolerance in sub-threshold designs, in 19th International Symposium on Quality Electronic Design (ISQED), 2018.
S. Kamineni, Sharma, A., Harjani, R., Sapatnekar, S. S., and Calhoun, B. H., AuxcellGen: A Framework for Autonomous Generation of Analog and Memory Unit Cells, in Design, Automation and Test in Europe Conference (DATE), 2023, 2023.PDF icon AuxcellGen-A Framework for Autonomous Generation of Analog and Memory Unit Cells.pdf (3.37 MB)
S. Kamineni, Gupta, S., and Calhoun, B. H., MemGen: An Open-Source Framework for Autonomous Generation of Memory Macros, in IEEE Custom Integrated Circuits Conference (CICC), 2021.PDF icon kamineni2021.pdf (9.26 MB)
S. Khanna, Nalam, S. V., and Calhoun, B. H., Pipelined Non-Strobed Sensing Scheme for Lowering BL Swing in Nano-scale Memories, in VLSI Design Conference, 2014.
S. Khanna and Calhoun, B. H., Serial Sub-threshold Circuits for Ultra-Low-Power Systems, in International Symposium on Low Power Electronics and Design, 2009.
S. Khanna, Craig, K., Shakhsheer, Y., Arrabi, S., Lach, J., and Calhoun, B., Stepped Supply Voltage Switching for Energy Constrained Systems, in ISQED, 2011.
A. Klinefelter, Roberts, N., Shakhsheer, Y., Gonzalez, P., Shrivastava, A., Roy, A., Craig, K., Faisal, M., Boley, J., Oh, S., Zhang, Y., Akella, D., Wentzloff, D. D., and Calhoun, B., A 6.45 μW Self-Powered IoT SoC with Integrated Energy-Harvesting Power Management and ULP Asymmetric Radios, in ISSCC, San Francisco, CA, 2015.
A. Klinefelter, Zhang, Y., Otis, B., and Calhoun, B. H., A Programmable 34 nW/Channel Sub-Threshold Signal Band Power Extractor on a Body Sensor Node SoC, Circuits and Systems II: Express Briefs, IEEE Transactions on, vol. 59, p. 941, 2012.
A. Klinefelter and Calhoun, B. H., A Reduced-Memory FIR Filter Using Approximate Coefficients for Ultra-Low Power SoCs, in S3S Conference, Monterey, CA, 2014.
A. Klinefelter, Ryan, J., Tschanz, J., and Calhoun, B. H., Error-Energy Analysis of Hardware Logarithmic Approximation Methods for Low Power Applications, in International Symposium on Circuits and Systems (ISCAS), 2015.
A. M. Klinefelter and Calhoun, B. H., A Programmable Multi-channel Sub-threshold FIR Filter for a Body Area Sensor Node. 2011.
A. Kosari, Breiholz, J., Liu, N. X., Calhoun, B. H., and Wentzloff, D. D., A 0.5 V 68 nW ECG Monitoring Analog Front-End for Arrhythmia Diagnosis, Journal of Low Power Electronics and Applications (JLPEA), 2018.
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S. Li, Breiholz, J., Kamineni, S., Im, J., Wentzloff, D. D., and Calhoun, B. H., An 85 nW IoT Node-Controlling SoC for MELs Power-Mode Management and Phantom Energy Reduction, in 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020.
S. Li, Liu, X., and Calhoun, B. H., A 32nA Fully Autonomous Multi-Input Single-Inductor Multi-Output Energy Harvesting and Power Management Platform with 1.2×10^5 Dynamic Range, Integrated MPPT, and Multi-Modal Cold Start-Up, in IEEE International Solid-State Circuits Conference (ISSCC), 2022.
S. Li, Roy, A., and Calhoun, B. H., A Piezoelectric Energy-Harvesting System with Parallel-SSHI Rectifier and Integrated MPPT Achieving 417% Energy-Extraction Improvement and 97% Tracking Efficiency, in 2019 Symposium on VLSI Circuits, Kyoto, Japan, 2019.
S. Li and Calhoun, B. H., Sub-microAmp Energy Harvesting and Power Management Units for Self-Powered IoT SoCs: Analog vs. Digital Implementations, in 2020 IEEE Custom Integrated Circuits Conference (CICC), (invited paper), 2020.
S. Li and Calhoun, B. H., A 745pA Hybrid Asynchronous Binary-Searching and Synchronous Linear-Searching Digital LDO with 3.8×105 Dynamic Load Range, 99.99% Current Efficiency, and 2mV Output Voltage Ripple, in IEEE International Solid- State Circuits Conference (ISSCC), San Francisco, CA, 2019.

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