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Publications

2012
A. Shrivastava and Calhoun, B. H., Modeling DC-DC Converter Efficiency and Power Management in Ultra Low Power Systems, in Subthreshold Microelectronics Conference, 2012.
K. Craig, Shakhsheer, Y., and Calhoun, B. H., Optimal Power Switch Design for Dynamic Voltage Scaling from High Performance to Subthreshold Operation, in International Symposium on Low Power Electronics and Design, 2012.
A. Klinefelter, Zhang, Y., Otis, B., and Calhoun, B. H., A Programmable 34 nW/Channel Sub-Threshold Signal Band Power Extractor on a Body Sensor Node SoC, Circuits and Systems II: Express Briefs, IEEE Transactions on, vol. 59, p. 941, 2012.
K. Craig, Shakhsheer, Y., Khanna, S., Arrabi, S., Lach, J., Calhoun, B. H., and Kosonocky, S., A Programmable Resistive Power Grid for Post-Fabrication Flexibility and Energy Tradeoffs, in International Symposium on Low Power Electronics and Design, 2012.
L. Szafaryn, Chen, J., Calhoun, B. H., Lach, J., Skadron, K., and Meyer, B. H., Reducing the Cost of Safety-Critical Systems with On-Demand Redundancy, in SRC Techcon, 2012.
P. Beshay, Bolus, J., Blalock, T., Chandra, V., and Calhoun, B. H., SRAM Sense Amplifier Offset Cancellation Using BTI Stress, in Subthreshold Microelectronics Conference, 2012.
P. Beshay, Ryan, J. F., and Calhoun, B. H., Sub-threshold Sense Amplifier Compensation Using Auto-zeroing Circuitry, in Subthreshold Microelectronics Conference, 2012.
S. N. Wooters, Cabe, A. C., Qi, Z., Wang, J., Mann, R. W., Calhoun, B. H., Stan, M. R., and Blalock, T. N., Tracking On-Chip Age Using Distributed, Embedded Sensors, Transactions on VLSI Systems (TVLSI), vol. 20, p. 12, 2012.
2011
S. Nalam and Calhoun, B. H., 5T SRAM with Asymmetric Sizing for Improved Read Stability, JSSC, 2011.
Y. Shakhsheer, Khanna, S., Craig, K., Arrabi, S., Lach, J., and Calhoun, B. H., A 90nm Data Flow Processor Demonstrating Fine Grained DVS for Energy Efficient Operation from 0.25V to 1.2V, in Custom Integrated Circuits Conference, San Jose, 2011.
J. F. Ryan, Khanna, S., and Calhoun, B. H., An Analytical Model for Performance Yield of Nanoscale SRAM Accounting for the Sense Amplifier Strobe Signal, in Internation Symposium on Lower Power Electronics and Design (ISLPED), 2011.
J. Boley, Calhoun, B. H., and Wang, J., Analyzing Subthreshold Bitcell Topologies and the Effects of Assist Methods on SRAM Vmin. 2011.
W. C. Eberhardt, Shakhsheer, Y. A., and Calhoun, B. H., A Bio-Inspired Artificial Whisker for Fluid Motion Sensing with Increased Sensitivity and Reliability, in IEEE Sensors, Limrick, Ireland, 2011.
B. H. Calhoun, Lach, J., Stankovic, J., Wentzloff, D. D., Whitehouse, K., Barth, A., Brown, J. K., Li, Q., Oh, S., Roberts, N., and Zhang, Y., Body Sensor Networks: A Holistic Approach From Silicon to Users, IEEE Proceedings, 2011.
Y. Zhang and Calhoun, B. H., The Cost of Fixing Hold Time Violations in Sub-threshold Circuits. 2011.
B. H. Meyer, Calhoun, B. H., Lach, J. C., and Skadron, K., Cost-effective Safety and Fault Localization using Distributed Temporal Redundancy, CASES. 2011.
S. Nalam, Chandra, V., Aitken, R. C., and Calhoun, B. H., Dynamic Write Limited Minimum Operating Voltage for Nanoscale SRAM, in Design Automation and Test Europe (DATE), 2011.
Y. Zhang, Shakhsheer, Y., Barth, A. T., Powell, Jr., H. C., Ridenour, S. A., Hanson, M. A., Lach, J., and Calhoun, B. H., Energy Efficient Design for Body Sensor Nodes, Journal of Low Power Electronics and Applications, 2011.
J. Wang, Hoefler, A., and Calhoun, B. H., An Enhanced Canary-based System with BIST for SRAM Standby Power Reduction, Transactions on VLSI Systems (TVLSI), 2011.
C. T. Murphy, W. Eberhardt, C., Calhoun, B. H., and Mann, D. A., Flow-induced Vibrations of Pinniped Vibrissae: Effects of Angular Orientation and Implications for Hydrodynamic Reception, in Conference on the Biology of Marine Mammals, 2011.
J. Wang and Calhoun, B. H., Minimum Supply Voltage and Yield Estimation for Large SRAMs Under Parametric Variations, Transactions on VLSI Systems (TVLSI), 2011.
R. Mann and Calhoun, B., New category of ultra-thin notchless 6T SRAM cell layout topologies for sub-22nm, in ISQED, 2011.
R. W. Mann, Hook, T. B., Nguyen, P., and Calhoun, B. H., Non-Random Device Mismatch Considerations in Nanoscale SRAM, IEEE Transactions of VLSI Systems (TVLSI), 2011.
K. Craig, Shakhsheer, Y., Khanna, S., and Calhoun, B. H., Optimal Power Switch Design for Panoptic Dynamic Voltage Scaling Enabling Subthreshold Operation, in Subthreshold Microelectronics Conference, 2011.
A. M. Klinefelter and Calhoun, B. H., A Programmable Multi-channel Sub-threshold FIR Filter for a Body Area Sensor Node. 2011.

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