Robust Low Power VLSI

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H. Qi, Ayorinde, O., Huang, Y., and Calhoun, B., “Optimizing energy efficient low-swing interconnect for sub-threshold FPGAs”, in 2015 25th International Conference on Field Programmable Logic and Applications (FPL), London, UK, 2015.

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M. Putic, Di, L., Calhoun, B. H., and Lach, andJohn, “Panoptic DVS: A Fine-Grained Dynamic Voltage Scaling Framework for Energy Scalable CMOS Design”, in International Conference on Computer Design (ICCD), 2009, pp. 491-497.

H. N. Patel, Roy, A., Yahya, F. B., Liu, N., Kumeno, K., Yasuda, M., Harada, A., Ema, T., and Calhoun, B. H., “A 55nm Ultra Low Leakage Deeply Depleted Channel Technology Optimized for Energy Minimization in Subthreshold SRAM and Logic”, in European Solid State Circuits Conference (ESSCIRC), 2016.

H. N. Patel, Yahya, F. B., and Calhoun, B. H., “Subthreshold SRAM: Challenges, Design Decisions, and Solutions”, in 60th IEEE International Midwest Symposium on Circuits and Systems, Boston, MA, USA, 2017.

H. Patel, Yahya, F., and Calhoun, B. H., “Improving Reliability and Energy Requirements of Memory in Body Sensor Networks.”, in International Conference on VLSI Design, Kolkata, India, 2016.

H. Patel, Yahya, F., and Calhoun, B., “Optimizing SRAM Bitcell Reliability and Energy for IoT Applications”, in International Symposium on Quality Electronic Design (ISQED), Santa Clara, CA, 2016.

H. N. Patel, Mann, R. W., and Calhoun, B. H., “Soft Errors: Reliability Challenges in Energy-Constrained ULP Body Sensor Networks Applications”, in 23rd IEEE International Symposium on On-Line Testing and Robust System Design, Thessaloniki, Greece, 2017.

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N. Ownby, Flynn, K., and Calhoun, B. H., “Modeling Energy Aware Photoplethsmography for Personalized Healthcare Applications”, in IEEE Transactions on Biomedical Circuits and Systems, 2022.

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S. Nalam, Chandra, V., Aitken, R. C., and Calhoun, B. H., “Dynamic Write Limited Minimum Operating Voltage for Nanoscale SRAM”, in Design Automation and Test Europe (DATE), 2011.

S. Nalam, Bhargava, M., Ringgenberg, K., Mai, K., and Calhoun, B. H., “A Technology-Agnostic Simulation Environment (TASE) for Iterative Custom IC Design across Processes”, in ICCD, 2009, pp. 523-528.

S. Nalam, Chandra, V., Pietrzyk, C., Aitken, R. C., and Calhoun, B. H., “Asymmetric 6T SRAM with Two-phase Write and Split Bitline Differential Sensing for Low Voltage Operation”, in ISQED, 2010, pp. 139-146.

S. Nalam, Bhargava, M., Mai, K., and Calhoun, B. H., “Virtual Prototyper (ViPro): An Early Design Space Exploration and Optimization Tool for SRAM Designers”, in Design Automation Conference (DAC), 2010, pp. 138-143.

S. Nalam and Calhoun, B. H., “5T SRAM with Asymmetric Sizing for Improved Read Stability”, JSSC, 2011.

S. Nalam and Calhoun, B. H., “Asymmetric Sizing in a 45nm 5T SRAM to Improve Read Stability over 6T”, in CICC, 2009, pp. 709-712.

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C. T. Murphy, Eberhardt, W. C., Calhoun, B. H., Mann, K. A., and Mann, D. A., “Effect of Angle on Flow-Induced Vibrations of Pinniped Vibrissae”, PLOS One, vol. Vol. 8, No. 7, 2013.

C. T. Murphy, W. Eberhardt, C., Calhoun, B. H., and Mann, D. A., “Flow-induced Vibrations of Pinniped Vibrissae: Effects of Angular Orientation and Implications for Hydrodynamic Reception”, in Conference on the Biology of Marine Mammals, 2011.

J. Moody, Bassirian, P., Roy, A., Liu, N. X., Pancrazio, S., N. Barker, S., Calhoun, B. H., and Bowers, S. M., “A -76dBm 7.4 nW wakeup radio with automatic offset compensation”, in International Solid-State Circuits Conference (ISSCC), 2018.

J. Moody, Dissanayake, A., Bishop, H., Lu, R., Liu, N. X., Duvvuri, D., Gao, A., Truesdell, D. S., N. Barker, S., Gong, S., Calhoun, B. H., and Bowers, S. M., “A -106dBm 33nW Bit-Level Duty-Cycled Tuned RF Wake-up Receiver”, in 2019 Symposium on VLSI Circuits, Kyoto, Japan, 2019.

J. Moody, Bassirian, P., Roy, A., Feng, Y., Li, S., Costanzo, R., N. Barker, S., Calhoun, B. H., and Bowers, S. M., “An 8.3 nW -72 dBm Event Driven IoE Wake Up Receiver RF Front End”, in 2017 European Microwave Integrated Circuit Conference (EuMIC), Nuremberg, Germany, 2017.

J. Moody, Dissanayake, A., Bishop, H. L., Lu, R., Liu, N. X., Duvvuri, D., Gao, A., Truesdell, D. S., N. Barker, S., Gong, S., Calhoun, B. H., and Bowers, S. M., “A Highly Re-configurable Bit-level Duty Cycled TRF Receiver Achieving -106 dBm Sensitivity and 33 nW Average Power Consumption”, IEEE Solid-State Circuits Letters (SSCL), Special Issue on VLSI (invited paper), 2019.

J. Moody, Bassirian, P., Roy, A., Liu, N. X., N Barker, S., Calhoun, B. H., and Bowers, S. M., “Interference Robust Detector-First Near-Zero Power Wake-Up Receiver”, IEEE Journal of Solid-State Circuits, 2019.

V. Misra, Bozkurt, A., Calhoun, B., Jackson, T., Jur, J., Lach, J., Lee, B., Muth, J., Oralkan, O., Ozturk, M., Trolier-McKinstry, S., Vashaee, D., Wentzloff, D., and Zhu, Y., “Flexible Technologies for Self-Powered Wearable Health and Environmental Sensing”, Proceedings of the IEEE, vol. 103, pp. 665-681, 2015.

B. H. Meyer, Calhoun, B. H., Lach, J. C., and Skadron, K., “Cost-effective Safety and Fault Localization using Distributed Temporal Redundancy”, CASES. 2011.

B. H. Meyer, Skadron, K., George, N., Calhoun, B. H., and Lach, J., “Reducing the Cost of Redundant Execution in Safety-Critical Systems using Relaxed Dedication”, in Design Automation and Test in Europe (DATE), 2011.

R. W. Mann, Wang, J., Nalam, S., Khanna, S., Braceras, G., Pilo, H., and Calhoun, B. H., “Impact of circuit assist methods on margin and performance in 6T SRAM”, Journal of Solid State Electronics, vol. 54, pp. 1398-1407, 2010.

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