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Author Title [ Type(Desc)] Year
Filters: Author is Sumanth Kamineni  [Clear All Filters]
Conference Paper
X. Liu, Kamineni, S., Breiholz, J., Calhoun, B. H., and Li, S., A 194nW Energy-Performance-Aware IoT SoC Employing a 5.2nW 92.6% Peak Efficiency Power Management Unit for System Performance Scaling, Fast DVFS and Energy Minimization, in IEEE International Solid-State Circuits Conference (ISSCC), 2022.PDF icon A 194nW Energy-Performance-Aware IoT SoC Employing a 5.2nW 92.6% Peak Efficiency Power Management Unit for System Performance Scaling, Fa.pdf (4.4 MB)
N. X. Liu, Agarwala, R., Dissanayake, A., Truesdell, D. S., Kamineni, S., Chen, X., Wentzloff, D. D., and Calhoun, B. H., A 2.5 ppm/°C 1.05 MHz Relaxation Oscillator with Dynamic Frequency-Error Compensation and 8 µs Start-Up Time, in IEEE European Solid-State Circuits Conference (ESSCIRC), Dresden, Germany, 2018.
S. Li, Breiholz, J., Kamineni, S., Im, J., Wentzloff, D. D., and Calhoun, B. H., An 85 nW IoT Node-Controlling SoC for MELs Power-Mode Management and Phantom Energy Reduction, in 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020.
S. Kamineni, Sharma, A., Harjani, R., Sapatnekar, S. S., and Calhoun, B. H., AuxcellGen: A Framework for Autonomous Generation of Analog and Memory Unit Cells, in Design, Automation and Test in Europe Conference (DATE), 2023, In Press.
S. Kamineni, Sharma, A., Jarjani, R., Sapatnekar, S. S., and Calhoun, B. H., AuxcellGen: A Framework for Autonomous Generation of Analog and Memory Unit Cells, in Design, Automation and Test in Europe Conference (DATE).
S. Kamineni, Gupta, S., and Calhoun, B. H., MemGen: An Open-Source Framework for Autonomous Generation of Memory Macros, in IEEE Custom Integrated Circuits Conference (CICC), 2021.PDF icon kamineni2021.pdf (9.26 MB)
T. Ajayi, Kamineni, S., Cherivirala, Y. K., Fayazi, M., Kwon, K., Saligane, M., Gupta, S., Chen, C. - H., Sylvester, D., Blaauw, D., Dreslinski, Jr, R., Calhoun, B., and Wentzloff, D. D., An Open-source Framework for Autonomous SoC Design with Analog Block Generation, in 28th IFIP/IEEE International Conference on Very Large Scale Integration, Salt Lake City, UT, USA. (Nominated for Best Paper Award), 2020.