VLSI Design Group


Search This Site


Export 141 results:
Author Title Type [ Year(Asc)]
Filters: Author is Benton H. Calhoun  [Clear All Filters]
J. Breiholz, Yahya, F., Lukas, C. J., Chen, X., Leach, K., Wentzloff, D., and Calhoun, B. H., A 4.4 nW Lossless Sensor Data Compression Accelerator for 2.9x System Power Reduction in Wireless Body Sensors, in 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), Boston, MA, USA, 2017.
A. Roy and Calhoun, B. H., A 71% Efficient Energy Harvesting and Power Management Unit for Sub-µW Power Biomedical Applications, in 2017 IEEE Biomedical Circuits and Systems Conference (BioCAS), Turin, Italy, 2017.
J. Moody, Bassirian, P., Roy, A., Feng, Y., Li, S., Costanzo, R., N. Barker, S., Calhoun, B. H., and Bowers, S. M., An 8.3 nW -72 dBm Event Driven IoE Wake Up Receiver RF Front End, in 2017 European Microwave Integrated Circuit Conference (EuMIC), Nuremberg, Germany, 2017.
F. Yahya, Lukas, C. J., Breiholz, J., Roy, A., Patel, H. N., Liu, N. X., Chen, X., Kosari, A., Li, S., Akella, D., Ayorinde, O., Wentzloff, D. D., and Calhoun, B. H., A battery-less 507nW SoC with integrated platform power manager and SiP interfaces, in 2017 Symposium on VLSI Circuits, Kyoto, Japan, 2017.
F. B. Yahya, Lukas, C. J., and Calhoun, B. H., FAR: A 4.12uW Ferro-electric Auto-Recovery for Battery-less BSN SoCs, in 2017 IEEE Biomedical Circuits and Systems Conference (BioCAS), Turin, Italy, 2017.
C. J. Lukas, Yahya, F. B., and Calhoun, B. H., Modeling Trans-threshold Correlations for Reducing Functional Test Time in Ultra-Low Power Systems, in 2017 IEEE International Test Conference (ITC), Fort Worth, TX, USA, 2017.
H. N. Patel, Mann, R. W., and Calhoun, B. H., Soft Errors: Reliability Challenges in Energy-Constrained ULP Body Sensor Networks Applications, in 23rd IEEE International Symposium on On-Line Testing and Robust System Design, Thessaloniki, Greece, 2017.
H. N. Patel, Yahya, F. B., and Calhoun, B. H., Subthreshold SRAM: Challenges, Design Decisions, and Solutions, in 60th IEEE International Midwest Symposium on Circuits and Systems, Boston, MA, USA, 2017.
H. Qi, Ayorinde, O., and Calhoun, B. H., An Ultra-Low-Power FPGA for IoT Applications, in S3S 2017, 2017.
A. Shrivastava, Pandey, J., Otis, B., and Calhoun, B. H., A 50nW, 100kbps Clock/Data Recovery Circuit in an FSK RF Receiver on a Body Sensor Node, in VLSI Design Conference, 2013.
Y. Zhang, Zhang, F., Shakhsheer, Y., Silver, J. D., Klinefelter, A., Nagaraju, M., Boley, J., Pandey, J., Shrivastava, A., Carlson, E. J., Wood, A., Calhoun, B. H., and Otis, B. P., A Batteryless 19 uW MICS/ISM-Band Energy Harvesting Body Sensor Node SoC for ExG Applications, Journal of Solid State Circuits, vol. 48, pp. 199-213, 2013.
A. Shrivastava and Calhoun, B. H., A DC-DC Converter Efficiency Model for System Level Analysis in Ultra Low Power Applications, 2013.
P. Beshay, Ryan, J. F., and Calhoun, B. H., A Digital Auto-Zeroing Circuit to Reduce Offset in Sub-threshold Sense Amplifiers, Journal of Low Power Electronics and Applications, 2013.
C. T. Murphy, Eberhardt, W. C., Calhoun, B. H., Mann, K. A., and Mann, D. A., Effect of Angle on Flow-Induced Vibrations of Pinniped Vibrissae, PLOS One, vol. Vol. 8, No. 7, 2013.
Y. Zhang and Calhoun, B. H., Hold Time Closure for Subthreshold Circuits Using a Two-Phase, Latch Based Timing Method, in S3S Conference, Monterey, California, 2013.
A. Banerjee and Calhoun, B. H., An Ultra Low Energy 9T Half-select-free Subthreshold SRAM bitcell, in S3S, Monterey, CA, 2013.