VLSI Design Group

Navigation

Search This Site

Publications

Journal Article
S. Z. Ahmed, Truesdell, D. S., Tan, Y., Calhoun, B. H., and Ghosh, A. W., A comprehensive analysis of Auger generation impacted planar Tunnel FETs, Solid-State Electronics, 2020.
B. H. Calhoun and Brooks, D., Can Subthreshold and Near-Threshold Circuits Go Mainstream?, IEEE Micro, vol. 30, pp. 80-85, 2010.
B. H. Calhoun, Lach, J., Stankovic, J., Wentzloff, D. D., Whitehouse, K., Barth, A., Brown, J. K., Li, Q., Oh, S., Roberts, N., and Zhang, Y., Body Sensor Networks: A Holistic Approach From Silicon to Users, IEEE Proceedings, 2011.
M. A. Hanson, Jr, H. C. Powell, Barth, A. T., Ringgenberg, K., Calhoun, B. H., Aylor, J. H., and Lach, J., Body Area Sensor Networks: Challenges and Opportunities, Computer, vol. 42, pp. 58–65, 2009.
Y. Zhang, Zhang, F., Shakhsheer, Y., Silver, J. D., Klinefelter, A., Nagaraju, M., Boley, J., Pandey, J., Shrivastava, A., Carlson, E. J., Wood, A., Calhoun, B. H., and Otis, B. P., A Batteryless 19 uW MICS/ISM-Band Energy Harvesting Body Sensor Node SoC for ExG Applications, Journal of Solid State Circuits, vol. 48, pp. 199-213, 2013.
J. Boley, Wang, J., and Calhoun, B. H., Analyzing Sub-Threshold Bitcell Topologies and the Effects of Assist Methods on SRAM VMIN, Journal of Low Power Electronics and Applications (JLPEA), vol. 2, p. 12, 2012.
J. Boley, Wang, J., and Calhoun, B. H., Analyzing Sub-Threshold Bitcell Topologies and the Effects of Assist Methods on SRAM Vmin, Journal of Low Power Electronics and Applications, 2012.
X. Chen, Breiholz, J., Yahya, F. B., Lukas, C. J., Kim, H. - S., Calhoun, B. H., and Wentzloff, D. D., Analysis and Design of an Ultra-Low-Power Bluetooth Low-Energy Transmitter With Ring Oscillator-Based ADPLL and 4 Frequency Edge Combiner, IEEE Journal of Solid-State Circuits, 2019.
D. S. Truesdell, Breiholz, J., Kamineni, S., Liu, N. X., Magyar, A., and Calhoun, B. H., A 6–140-nW 11 Hz–8.2-kHz DVFS RISC-V Microprocessor Using Scalable Dynamic Leakage-Suppression Logic, IEEE Solid-State Circuits Letters (SSCL), 2019.PDF icon A 6–140-nW 11 Hz–8.2-kHz DVFS RISC-V Microprocessor Using Scalable Dynamic Leakage-Suppression Logic (1.63 MB)
A. Roy, Klinefelter, A., Yahya, F., Chen, X., Gonzalez, P., Lukas, C. J., Akella, D., Boley, J., Craig, K., Faisal, M., Oh, S., Roberts, N., Shakhsheer, Y., Shrivastava, A., Vasudevan, D., Wentzloff, D. D., and Calhoun, B., A 6.45μW Self-Powered SoC with Integrated Energy-Harvesting Power Management and ULP Asymmetric Radios for Portable Biomedical Systems, IEEE Transactions on Biomedical Circuits and Systems, vol. 9, pp. 862-874, 2015.
S. Nalam and Calhoun, B. H., 5T SRAM with Asymmetric Sizing for Improved Read Stability, JSSC, 2011.
J. .Bolus, Calhoun, B. H., and .Blalock, T., 39 fJ/bit On-Chip Identification of Wireless Sensors Based on Manufacturing Variation, Journal of Low Power Electronics and Applications (JLPEA), vol. 4, p. 16, 2014.
D. Akella, Shrivastava, A., Duan, C., and Calhoun, B. H., A 36nW, 7 ppm/oC Fully On-Chip Clock Source System for Ultra-Low Power Applications, Journal of Low Power Electronics and Applications (JLPEA), vol. 6, 2016.
K. Craig, Shakhsheer, Y., Arrabi, S., Khanna, S., Lach, J., and Calhoun, B. H., A 32b 90nm Processor Implementing Panoptic DVS Achieving Energy Efficient Operation from Sub-threshold to High Performance, Journal of Solid State Circuits, 2014.
B. H. Calhoun and Chandrakasan, A., A 256kb 65nm Sub-threshold SRAM Design for Ultra-low Voltage Operation, IEEE Journal of Solid-State Circuits (JSSC), vol. 42, pp. 680-688, 2007.
N. X. Liu, Agarwala, R., Dissanayake, A., Truesdell, D. S., Kamineni, S., and Calhoun, B. H., A 2.5 ppm/°C 1.05 MHz Relaxation Oscillator with Dynamic Frequency-Error Compensation and Fast Start-Up Time, IEEE Journal of Solid-State Circuits (JSSC), 2019.
A. Dissanayake, Bishop, H. L., Bowers, S. M., and Calhoun, B. H., A 2.4 GHz-91.5 dBm Sensitivity Within-Packet Duty-Cycled Wake-Up Receiver, IEEE Journal of Solid-State Circuits, 2021.
P. Wang, Agarwala, R., Ownby, N., Liu, X., and Calhoun, B. H., A 2.3-5.7μW Tri-Modal Self-Adaptive Photoplethysmography Sensor Interface IC for Heart Rate, SpO2 , and Pulse Transit Time Co-Monitoring, IEEE Transactions on Biomedical Circuits and Systems, 2024.
X. Shen, Duvvuri, D., Bassirian, P., Bishop, H. L., Liu, X., Dissanayake, A., Zhang, Y., Blalock, T. N., Calhoun, B. H., and Bowers, S. M., A 184 nW, -78.3 dBm Sensitivity Antenna-Coupled Supply, Temperature, and Interference-Robust Wake-up Receiver at 4.9 GHz, IEEE Transactions on Microwave Theory and Techniques, 2022.
A. Shrivastava, Akella, D., and Calhoun, B. H., A 1.5nW, 32.768kHz XTAL Oscillator Operational from 0.3V Supply, IEEE Journal of Solid-State Circuits (JSSC), vol. 51, 2016.
A. Shrivastava, Roberts, N. E., Khan, O. U., Wentzloff, D. D., and Calhoun, B. H., A 10mV-Input Boost Converter with Inductor Peak Current Control and Zero Detection for Thermoelectric and Solar Energy Harvesting with 220mV Cold-Start and -14.5dBm, 915MHz RF Kick-Start, IEEE Journal of Solid-State Circuits (JSSC), vol. 50, pp. 1820-1832, 2015.
C. J. Lukas, Yahya, F. B., Breiholz, J., Roy, A., Chen, X., Patel, H. N., Liu, N. X., Kosari, A., Li, S., Kamakshi, D. Akella, Ayorinde, O., Wentzloff, D. D., and Calhoun, B. H., A 1.02 μW Battery-Less, Continuous Sensing and Post-Processing SiP for Wearable Applications, IEEE Transactions on Biomedical Circuits and Systems, 2019.PDF icon 08625544.pdf (3.22 MB)
R. Agarwala, Wang, P., Bishop, H. L., Dissanayake, A., and Calhoun, B. H., A 0.6V 785-nW Multimodal Sensor Interface IC for Ozone Pollutant Sensing and Correlated Cardiovascular Disease Monitoring, IEEE Journal of Solid-State Circuits, 2021.
D. S. Truesdell, Dissanayake, A., and Calhoun, B. H., A 0.6-V 44.6-fJ/Cycle Energy-Optimized Frequency-Locked Loop in 65-nm CMOS With 20.3-ppm/°C Stability, IEEE Solid-State Circuits Letters (SSCL), 2019.PDF icon A 0.6-V 44.6-fJ Cycle Energy-Optimized Frequency-Locked Loop in 65-nm CMOS With 20.3-ppm C Stability.pdf (1.64 MB)
D. S. Truesdell, Li, S., and Calhoun, B. H., A 0.5V 560-kHz 18.8-fJ/Cycle On-Chip Oscillator with 96.1-ppm/°C Steady-State Stability Using a Duty-Cycled Digital Frequency-Locked Loop, IEEE Journal of Solid-State Circuits, 2021.PDF icon A 0.5-V 560-kHz 18.8-fJ_Cycle On-Chip Oscillator With 96.1ppm_C Steady-State Stability Using a Duty-Cycled Digital Frequency-Locked Loop.pdf (2.95 MB)

Pages