VLSI Design Group

Navigation

Search This Site

Publications

2019
J. Moody, Dissanayake, A., Bishop, H., Lu, R., Liu, N. X., Duvvuri, D., Gao, A., Truesdell, D. S., N. Barker, S., Gong, S., Calhoun, B. H., and Bowers, S. M., A -106dBm 33nW Bit-Level Duty-Cycled Tuned RF Wake-up Receiver, in 2019 Symposium on VLSI Circuits, Kyoto, Japan, 2019.
N. X. Liu, Agarwala, R., Dissanayake, A., Truesdell, D. S., Kamineni, S., and Calhoun, B. H., A 2.5 ppm/°C 1.05 MHz Relaxation Oscillator with Dynamic Frequency-Error Compensation and Fast Start-Up Time, IEEE Journal of Solid-State Circuits (JSSC), 2019.
D. S. Truesdell and Calhoun, B. H., A 640 pW 22 pJ/sample Gate Leakage-Based Digital CMOS Temperature Sensor with 0.25°C Resolution, in IEEE Custom Integrated Circuits Conference (CICC) 2019, Austin, TX, 2019.PDF icon A 640 pW 22 pJ_sample Gate Leakage-Based Digital CMOS Temperature Sensor with 0.25C Resolution.pdf (1.81 MB)
D. S. Truesdell, Breiholz, J., Kamineni, S., Liu, N. X., Magyar, A., and Calhoun, B. H., A 6–140-nW 11 Hz–8.2-kHz DVFS RISC-V Microprocessor Using Scalable Dynamic Leakage-Suppression Logic, IEEE Solid-State Circuits Letters (SSCL), 2019.PDF icon A 6–140-nW 11 Hz–8.2-kHz DVFS RISC-V Microprocessor Using Scalable Dynamic Leakage-Suppression Logic (1.63 MB)
S. Li and Calhoun, B. H., A 745pA Hybrid Asynchronous Binary-Searching and Synchronous Linear-Searching Digital LDO with 3.8×105 Dynamic Load Range, 99.99% Current Efficiency, and 2mV Output Voltage Ripple, in IEEE International Solid- State Circuits Conference (ISSCC), San Francisco, CA, 2019.
X. Chen, Breiholz, J., Yahya, F. B., Lukas, C. J., Kim, H. - S., Calhoun, B. H., and Wentzloff, D. D., Analysis and Design of an Ultra-Low-Power Bluetooth Low-Energy Transmitter With Ring Oscillator-Based ADPLL and 4 Frequency Edge Combiner, IEEE Journal of Solid-State Circuits, 2019.
A. Banerjee, A Double Pumped Single-Line-Cache SRAM Architecture for Ultra-low Energy IoT and Machine Learning Applications, in 32nd International Conference on VLSI Design, 2019.
A. Alghaihab, Shi, Y., Breiholz, J., Kim, H. - S., Calhoun, B. H., and Wentzloff, D. D., Enhanced Interference Rejection Bluetooth Low-Energy Back-Channel Receiver With LO Frequency Hopping, IEEE Journal of Solid-State Circuits, 2019.
J. Moody, Dissanayake, A., Bishop, H. L., Lu, R., Liu, N. X., Duvvuri, D., Gao, A., Truesdell, D. S., N. Barker, S., Gong, S., Calhoun, B. H., and Bowers, S. M., A Highly Re-configurable Bit-level Duty Cycled TRF Receiver Achieving -106 dBm Sensitivity and 33 nW Average Power Consumption, IEEE Solid-State Circuits Letters (SSCL), Special Issue on VLSI (invited paper), 2019.
D. S. Truesdell and Calhoun, B. H., Improving Dynamic Leakage Suppression Logic with Forward Body Bias in 65nm CMOS, in IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2019.
J. Moody, Bassirian, P., Roy, A., Liu, N. X., N Barker, S., Calhoun, B. H., and Bowers, S. M., Interference Robust Detector-First Near-Zero Power Wake-Up Receiver, IEEE Journal of Solid-State Circuits, 2019.
O. Abdelatty, Bishop, H., Shi, Y., Chen, X., Alghaihab, A., Calhoun, B., and Wentzloff, D., A Low Power Bluetooth Low-Energy Transmitter with a 10.5nJ Startup-Energy Crystal Oscillator, in IEEE European Solid-State Circuits Conference (ESSCIRC), Cracow, Poland, 2019.
P. Bassirian, Moody, J., Lu, R., Gao, A., Manzaneque, T., Roy, A., N Barker, S., Calhoun, B. H., Gong, S., and Bowers, S. M., Nanowatt-Level Wakeup Receiver Front Ends Using MEMS Resonators for Impedance Transformation, IEEE Transactions on Microwave Theory and Techniques, 2019.
S. Li, Roy, A., and Calhoun, B. H., A Piezoelectric Energy-Harvesting System with Parallel-SSHI Rectifier and Integrated MPPT Achieving 417% Energy-Extraction Improvement and 97% Tracking Efficiency, in 2019 Symposium on VLSI Circuits, Kyoto, Japan, 2019.
S. Li, Roy, A., and Calhoun, B. H., A Piezoelectric Energy-Harvesting System with Parallel-SSHI Rectifier and Integrated Maximum-Power-Point Tracking, IEEE Solid-State Circuits Letters (SSCL), Special Issue on VLSI (invited paper), 2019.
2018
A. Kosari, Breiholz, J., Liu, N. X., Calhoun, B. H., and Wentzloff, D. D., A 0.5 V 68 nW ECG Monitoring Analog Front-End for Arrhythmia Diagnosis, Journal of Low Power Electronics and Applications (JLPEA), 2018.
N. X. Liu, Agarwala, R., Dissanayake, A., Truesdell, D. S., Kamineni, S., Chen, X., Wentzloff, D. D., and Calhoun, B. H., A 2.5 ppm/°C 1.05 MHz Relaxation Oscillator with Dynamic Frequency-Error Compensation and 8 µs Start-Up Time, in IEEE European Solid-State Circuits Conference (ESSCIRC), Dresden, Germany, 2018.
X. Chen, Breiholz, J., Yahya, F. B., Lukas, C. J., Kim, H. - S., Calhoun, B. H., and Wentzloff, D. D., A 486 µW All-Digital Bluetooth Low Energy Transmitter with Ring Oscillator Based ADPLL for IoT applications, in IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2018.
J. Moody, Bassirian, P., Roy, A., Liu, N. X., Pancrazio, S., N. Barker, S., Calhoun, B. H., and Bowers, S. M., A -76dBm 7.4 nW wakeup radio with automatic offset compensation, in International Solid-State Circuits Conference (ISSCC), 2018.
D. S. Truesdell and Calhoun, B. H., Channel Length Sizing for Power Minimization in Leakage-Dominated Digital Circuits, in IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2018.
O. Ayorinde, Qi, H., and Calhoun, B. H., FGC: A Tool-flow for Generating and Configuring Custom FPGAs, Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays. ACM, Monterey, CA, 2018.
H. L. Bishop, Wang, P., Fan, D., Lach, J., and Calhoun, B. H., Lighting IoT Test Environment (LITE) Platform: Evaluating Light-Powered, Energy HarvestingEmbedded Systems, in Global Internet of Things Summit (GIoTS), 2018.
S. Z. Ahmed, Tan, Y., Truesdell, D. S., Calhoun, B. H., and Ghosh, A., Modeling tunnel field effect transistors-from interface chemistry to non-idealities to circuit level performance, Journal of Applied Physics, 2018.
A. Banerjee, Kamineni, S., and Calhoun, B. H., Multiple Combined Write-Read Peripheral Assists in 6T FinFET SRAMs for Low-VMIN IoT and Cognitive Applications, Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED). IEEE, 2018.
D. Akella Kamakshi, Guo, X., Patel, H. N., Stan, M. R., and Calhoun, B. H., A post-silicon hold time closure technique using data-path tunable-buffers for variation-tolerance in sub-threshold designs, in 19th International Symposium on Quality Electronic Design (ISQED), 2018.

Pages