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2020
T. Ajayi, Cherivirala, Y. K., Kwon, K., Kamineni, S., Saligane, M., Fayazi, M., Gupta, S., Chen, C. - H., Sylvester, D., Blaauw, D., Dreslinski, Jr, R., Calhoun, B. H., and Wentzloff, D. D., Fully Autonomous Mixed Signal SoC Design & Layout Generation Platform, IEEE Hot Chips 32 Symposium (HCS). 2020.
D. S. Truesdell, Ahmed, S. Z., Ghosh, A. W., and Calhoun, B. H., Minimum-Energy Digital Computing with Steep Subthreshold Swing Tunnel FETs, IEEE Journal of Exploratory Solid-State Computational Devices and Circuits (JxCDC), 2020.PDF icon Minimum-Energy Digital Computing With Steep Subthreshold Swing Tunnel FETs.pdf (1.02 MB)
A. Dissanayake, Bishop, H. L., Moody, J., Muhlbauer, H., Calhoun, B. H., and Bowers, S. M., A Multichannel, MEMS-less -99dBm 260nW Bit-level Duty Cycled Wakeup Receiver, in 2020 IEEE Symposium on VLSI Circuits (VLSI), 2020.
T. Ajayi, Kamineni, S., Cherivirala, Y. K., Fayazi, M., Kwon, K., Saligane, M., Gupta, S., Chen, C. - H., Sylvester, D., Blaauw, D., Dreslinski, Jr, R., Calhoun, B., and Wentzloff, D. D., An Open-source Framework for Autonomous SoC Design with Analog Block Generation, in 28th IFIP/IEEE International Conference on Very Large Scale Integration, Salt Lake City, UT, USA. (Nominated for Best Paper Award), 2020.
T. Ajayi, Kamineni, S., Cherivirala, Y. K., Fayazi, M., Kwon, K., Saligane, M., Gupta, S., Chen, C. - H., Sylvester, D., Blaauw, D., Dreslinski, Jr, R., Calhoun, B., and Wentzloff, D. D., An Open-source Framework for Autonomous SoC Design with Analog Block Generation, in 28th IFIP/IEEE International Conference on Very Large Scale Integration, Salt Lake City, UT, USA. (Nominated for Best Paper Award), 2020.
T. Ajayi, Kamineni, S., Cherivirala, Y. K., Fayazi, M., Kwon, K., Saligane, M., Gupta, S., Chen, C. - H., Sylvester, D., Blaauw, D., Dreslinski, Jr, R., Calhoun, B., and Wentzloff, D. D., An Open-source Framework for Autonomous SoC Design with Analog Block Generation, in 28th IFIP/IEEE International Conference on Very Large Scale Integration, Salt Lake City, UT, USA. (Nominated for Best Paper Award), 2020.
D. S. Truesdell and Calhoun, B. H., A Single-Supply 6-Transistor Voltage Level Converter Design Reaching 8.18-fJ/Transition at 0.3-1.2-V Range or 44-fW Leakage at 0.8-2.5-V Range, IEEE Solid-State Circuits Letters (SSCL), 2020.PDF icon A Single-Supply 6-Transistor Voltage Level Converter Design Reaching 8.18-fJ_Transition at 0.3-1.2-V Range or 44-fW Leakage at 0.8-2.5-V Range.pdf (1.06 MB)
S. Li and Calhoun, B. H., Sub-microAmp Energy Harvesting and Power Management Units for Self-Powered IoT SoCs: Analog vs. Digital Implementations, in 2020 IEEE Custom Integrated Circuits Conference (CICC), (invited paper), 2020.
P. Bassirian, Duvvuri, D., Truesdell, D. S., Liu, N. X., Calhoun, B. H., and Bowers, S. M., A Temperature-robust 27.6nW -65dBm Wakeup Receiver at 9.6GHz X Band, in 2020 IEEE International Solid-State Circuits Conference (ISSCC), 2020.
A. Mallick, Bashar, M. K., Truesdell, D. S., Calhoun, B. H., Joshi, S., and Shukla, N., Using synchronized oscillators to compute the maximum independent set, Nature Communications, 2020.
2021
D. S. Truesdell, Li, S., and Calhoun, B. H., A 0.5V 560-kHz 18.8-fJ/Cycle On-Chip Oscillator with 96.1-ppm/°C Steady-State Stability Using a Duty-Cycled Digital Frequency-Locked Loop, IEEE Journal of Solid-State Circuits, 2021.PDF icon A 0.5-V 560-kHz 18.8-fJ_Cycle On-Chip Oscillator With 96.1ppm_C Steady-State Stability Using a Duty-Cycled Digital Frequency-Locked Loop.pdf (2.95 MB)
R. Agarwala, Wang, P., Bishop, H. L., Dissanayake, A., and Calhoun, B. H., A 0.6V 785-nW Multimodal Sensor Interface IC for Ozone Pollutant Sensing and Correlated Cardiovascular Disease Monitoring, IEEE Journal of Solid-State Circuits, 2021.
A. Dissanayake, Bishop, H. L., Bowers, S. M., and Calhoun, B. H., A 2.4 GHz-91.5 dBm Sensitivity Within-Packet Duty-Cycled Wake-Up Receiver, IEEE Journal of Solid-State Circuits, 2021.
D. Duvvuri, Shen, X., Bassirian, P., Bishop, H. L., Liu, X., Chen, C. - H., Dissanayake, A., Zhang, Y., Blalock, T. N., Calhoun, B. H., and Bowers, S. M., A 366 nW, -74.5 dBm Sensitivity Antenna-Coupled Wakeup Receiver at 4.9 GHz with Integrated Voltage Regulation and References, in IEEE MTT-S International Microwave Symposium (IMS), Atlanta, GA, 2021.
D. Duvvuri, Shen, X., Bassirian, P., Bishop, H. L., Liu, X., Chen, C. - H., Dissanayake, A., Zhang, Y., Blalock, T. N., Calhoun, B. H., and Bowers, S. M., A 366 nW, -74.5 dBm Sensitivity Antenna-Coupled Wakeup Receiver at 4.9 GHz with Integrated Voltage Regulation and References, in IEEE MTT-S International Microwave Symposium (IMS), Atlanta, GA, 2021.
R. Agarwala, Wang, P., and Calhoun, B. H., A 405nW/4.8μW Event-Driven Multi-Modal (V/I/R/C) Sensor Interface for Physiological and Environmental Co-Monitoring, in 2021 IEEE Biomedical Circuits and Systems Conference (BioCAS), 2021.
X. Liu, Li, S., and Calhoun, B. H., An 802pW 93% Peak Efficiency Buck Converter with 5.5×106 Dynamic Range Featuring Fast DVFS and Asynchronous Load-Transient Control, in 2021 IEEE European Solid-State Circuits Conference (ESSCIRC), 2021.PDF icon An 802pW 93% Peak Efficiency Buck Converter with 5.5×106 Dynamic Range Featuring Fast DVFS and Asynchronous Load-Transient Control.pdf (580.42 KB)
X. Chen, Alghaihab, A., Shi, Y., Truesdell, D. S., Calhoun, B. H., and Wentzloff, D. D., A Crystal-Less BLE Transmitter with Clock Recovery from GFSK-Modulated BLE Packets, IEEE Journal of Solid-State Circuits, 2021.
X. Chen, Alghaihab, A., Shi, Y., Truesdell, D. S., Calhoun, B. H., and Wentzloff, D. D., A Crystal-Less BLE Transmitter with Clock Recovery from GFSK-Modulated BLE Packets, IEEE Journal of Solid-State Circuits, 2021.
S. Gupta and Calhoun, B. H., Dynamic Read VMIN and Yield Estimation for Nanoscale SRAMs, IEEE Transactions on Circuits and Systems I: Regular Papers, 2021.PDF icon Dynamic Read VMIN and Yield Estimation of Nanoscale SRAMs.pdf (3.72 MB)
S. Gupta and Calhoun, B. H., Dynamic Write VMIN and Yield Estimation for Nanoscale SRAMs, IEEE Transactions on Circuits and Systems I: Regular Papers, 2021.PDF icon Dynamic Write VMIN and Yield Estimation for Nanoscale SRAMs.pdf (4.55 MB)
A. Mallick, Bashar, M. Khairul, Truesdell, D. S., Calhoun, B. H., Joshi, S., and Shukla, N., Graph Coloring using Coupled Oscillator-based Dynamical Systems, in 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021.
H. L. Bishop*, Dissanayake*, A., Bowers, S. M., and Calhoun, B. H., An Integrated 2.4GHz -91.5dBm Sensitivity Within-Packet Duty-Cycled Wake-Up Receiver Achieving 2μW at 100ms Latency, in IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA (*Equally-Credited Authors), 2021.
S. Kamineni, Gupta, S., and Calhoun, B. H., MemGen: An Open-Source Framework for Autonomous Generation of Memory Macros, in IEEE Custom Integrated Circuits Conference (CICC), 2021.PDF icon kamineni2021.pdf (9.26 MB)
K. Flynn, Ownby, N., Wang, P., and Calhoun, B. H., Modeling Energy-Aware Photoplethysmography Hardware for Personalized Health Care Applications Across Skin Phototypes, in IEEE Biomedical Circuits and Systems Conference (BioCAS), 2021.

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