Robust Low Power VLSI
VLSI Design Group

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Publications

Journal Article
A. Mallick, Bashar, M. K., Truesdell, D. S., Calhoun, B. H., Joshi, S., and Shukla, N., “Using synchronized oscillators to compute the maximum independent set”, Nature Communications, 2020.
J. Boley, Beshay, P., and Calhoun, B. H., “Virtual Prototyper (ViPro): An SRAM Design Tool for Yield Constrained Optimization”, Transactions of Very Large Scale Integration Systems, 2015.
B. H. Calhoun and Lach, J., “What is a Body Sensor Network?”, ACM / SIGDA Newsletter, vol. 41, 2011.
Miscellaneous
J. Boley, Calhoun, B. H., and Wang, J., “Analyzing Subthreshold Bitcell Topologies and the Effects of Assist Methods on SRAM Vmin”. 2011.
Y. Zhang and Calhoun, B. H., “The Cost of Fixing Hold Time Violations in Sub-threshold Circuits”. 2011.
A. M. Klinefelter and Calhoun, B. H., “A Programmable Multi-channel Sub-threshold FIR Filter for a Body Area Sensor Node”. 2011.
Y. Yu, Huang, J., Khanna, S., Calhoun, B. H., Lach, J., Shelat, A., and Evans, D., “A Sub-0.5V Lattice-Based Public-Key Encryption Scheme for RFID Platforms in 130nm”. 2011 Workshop on RFID Security, 2011.
A. Shrivastava and Calhoun, B. H., “A sub-threshold clock and data recovery circuit for a wireless sensor node”. 2011.

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