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Conference Paper
J. Moody, Bassirian, P., Roy, A., Feng, Y., Li, S., Costanzo, R., N. Barker, S., Calhoun, B. H., and Bowers, S. M., An 8.3 nW -72 dBm Event Driven IoE Wake Up Receiver RF Front End, in 2017 European Microwave Integrated Circuit Conference (EuMIC), Nuremberg, Germany, 2017.
S. Li, Breiholz, J., Kamineni, S., Im, J., Wentzloff, D. D., and Calhoun, B. H., An 85 nW IoT Node-Controlling SoC for MELs Power-Mode Management and Phantom Energy Reduction, in 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020.
H. L. Bishop, Wang, P., and Calhoun, B. H., Application-Driven Model of a PPG Sensing Modality for the Informed Design of Self-Powered, Wearable Healthcare Systems, in 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020.
F. Zhang, Zhang, Y., Silver, J., Shakhsheer, Y., Nagaraju, M., Klinefelter, A., Pandey, J., Boley, J., Carlson, E., Shrivastava, A., Otis, B., and Calhoun, B., A Batteryless 19uW MICS/ISM-Band Energy Harvesting Body Area Sensor Node SoC, in ISSCC, San Francisco, 2012.
F. Yahya, Lukas, C. J., Breiholz, J., Roy, A., Patel, H. N., Liu, N. X., Chen, X., Kosari, A., Li, S., Akella, D., Ayorinde, O., Wentzloff, D. D., and Calhoun, B. H., A battery-less 507nW SoC with integrated platform power manager and SiP interfaces, in 2017 Symposium on VLSI Circuits, Kyoto, Japan, 2017.
P. Beshay, Chandra, V., Aitken, R., and Calhoun, B. H., A Digital Dynamic Write Margin Sensor for Low Power Read/Write Operations in 28nm SRAM, in ISLPED, 2014.
A. Banerjee, A Double Pumped Single-Line-Cache SRAM Architecture for Ultra-low Energy IoT and Machine Learning Applications, in 32nd International Conference on VLSI Design, 2019.
P. Sotiriadis, Franza, O., Bailey, D., Calhoun, B., Lin, D., and Chandrakasan, A., Fast Algorithm for Clock Grid Simulation, in European Solid State Circuits Conference (ESSCIRC), 2002, pp. 771-774.
A. Mallick, Bashar, M. Khairul, Truesdell, D. S., Calhoun, B. H., Joshi, S., and Shukla, N., Graph Coloring using Coupled Oscillator-based Dynamical Systems, in 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021.
H. L. Bishop*, Dissanayake*, A., Bowers, S. M., and Calhoun, B. H., An Integrated 2.4GHz -91.5dBm Sensitivity Within-Packet Duty-Cycled Wake-Up Receiver Achieving 2μW at 100ms Latency, in IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA (*Equally-Credited Authors), 2021.
H. L. Bishop*, Dissanayake*, A., Bowers, S. M., and Calhoun, B. H., An Integrated 2.4GHz -91.5dBm Sensitivity Within-Packet Duty-Cycled Wake-Up Receiver Achieving 2μW at 100ms Latency, in IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA (*Equally-Credited Authors), 2021.
J. Boley, Chandra, V., Aitken, R., and Calhoun, B., Leveraging Sensitivity Analysis for Fast, Accurate Estimation of SRAM Dynamic VMIN, in Design Automation and Test Europe, 2013.
H. L. Bishop, Wang, P., Fan, D., Lach, J., and Calhoun, B. H., Lighting IoT Test Environment (LITE) Platform: Evaluating Light-Powered, Energy HarvestingEmbedded Systems, in Global Internet of Things Summit (GIoTS), 2018.
O. Abdelatty, Bishop, H., Shi, Y., Chen, X., Alghaihab, A., Calhoun, B., and Wentzloff, D., A Low Power Bluetooth Low-Energy Transmitter with a 10.5nJ Startup-Energy Crystal Oscillator, in IEEE European Solid-State Circuits Conference (ESSCIRC), Cracow, Poland, 2019.
A. D. Jurik, Bolus, J., Weaver, A. F., Calhoun, B. H., and Blalock., T. N., Mobile Health Monitoring Through Biotelemetry, in Bodynets, 2009.
A. D. Jurik, Bolus, J., Weaver, A. F., Calhoun, B. H., and Blalock., T. N., Mobile Health Monitoring Through Biotelemetry, in Bodynets, 2009.
J. Boley, Chandra, V., Aitken, R., and Calhoun, B. H., Modeling SRAM Dynamic VMIN, in International Conference on IC Design and Technology (ICICDT), 2014.
A. Dissanayake, Bishop, H. L., Moody, J., Muhlbauer, H., Calhoun, B. H., and Bowers, S. M., A Multichannel, MEMS-less -99dBm 260nW Bit-level Duty Cycled Wakeup Receiver, in 2020 IEEE Symposium on VLSI Circuits (VLSI), 2020.
A. Dissanayake, Bishop, H. L., Moody, J., Muhlbauer, H., Calhoun, B. H., and Bowers, S. M., A Multichannel, MEMS-less -99dBm 260nW Bit-level Duty Cycled Wakeup Receiver, in 2020 IEEE Symposium on VLSI Circuits (VLSI), 2020.
D. S. Truesdell, Liu, X., Breiholz, J., Gupta, S., Li, S., and Calhoun, B. H., NanoWattch: A Self-Powered 3-nW RISC-V SoC Operable from 160mV Photovoltaic Input with Integrated Temperature Sensing and Adaptive Performance Scaling, in 2022 IEEE Symposium on VLSI Circuits (VLSI), (Equally-Credited Authors), 2022.PDF icon NanoWattch A Self-Powered 3-nW RISC-V SoC Operable from 160mV Photovoltaic Input with Integrated Temperature Sensing and Adaptive Performance Scaling.pdf (11.11 MB)
T. Ajayi, Kamineni, S., Cherivirala, Y. K., Fayazi, M., Kwon, K., Saligane, M., Gupta, S., Chen, C. - H., Sylvester, D., Blaauw, D., Dreslinski, Jr, R., Calhoun, B., and Wentzloff, D. D., An Open-source Framework for Autonomous SoC Design with Analog Block Generation, in 28th IFIP/IEEE International Conference on Very Large Scale Integration, Salt Lake City, UT, USA. (Nominated for Best Paper Award), 2020.
A. Banerjee, Sinangil, M., Poulton, J., Gray, C. T., and Calhoun, B. H., A Reverse Write Assist Circuit for SRAM Dynamic Write VMIN Tracking using Canary SRAMs, in International Symposium on Quality Electronic Design (ISQED), 2014.
P. Beshay, Chandra, V., Aitken, R., and Calhoun, B. H., Self Calibrated Dynamic Write Margin Sensor for Low Power Read/Write Operations in Sub-32nm SRAM, in Design Automation Conference (DAC), 2014.
M. Bhargava, Nalam, S., Calhoun, B. H., and Mai, K., An SRAM Prototyping Tool for Rapid Sub-32nm Design Exploration and Optimization, in TECHCON, 2009.
P. Beshay, Bolus, J., Blalock, T., Chandra, V., and Calhoun, B. H., SRAM Sense Amplifier Offset Cancellation Using BTI Stress, in Subthreshold Microelectronics Conference, 2012.

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