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B. H. Calhoun and Brooks, D., Can Subthreshold and Near-Threshold Circuits Go Mainstream?, IEEE Micro, vol. 30, pp. 80-85, 2010.
J. Wang and Calhoun, B. H., Canary Replica Feedback for Near-DRV Standby VDD Scaling in a 90nm SRAM, in Custom Integrated Circuits Conference (CICC), 2007, pp. 29-32.
D. S. Truesdell and Calhoun, B. H., Channel Length Sizing for Power Minimization in Leakage-Dominated Digital Circuits, in IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2018.
B. H. Calhoun and Chandrakasan, A., Characterizing and Modeling Minimum Energy Operation for Subthreshold Circuits, in International Symposium on Low Power Electronics and Design, 2004, pp. 90-95.
F. B. Yahya, Patel, H. N., Chandra, V., and Calhoun, B. H., Combining SRAM Read/Write Assist Techniques for Near/Sub-Threshold Voltage Operation, in 6th Asia Symposium on Quality Electronic Design (ASQED 2015), Kuala Lumpur, Malaysia, 2015.
S. Z. Ahmed, Truesdell, D. S., Tan, Y., Calhoun, B. H., and Ghosh, A. W., A comprehensive analysis of Auger generation impacted planar Tunnel FETs, Solid-State Electronics, 2020.
Y. Zhang and Calhoun, B. H., The Cost of Fixing Hold Time Violations in Sub-threshold Circuits. 2011.

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