Robust Low Power VLSI
VLSI Design Group

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Author Title [ Type(Asc)] Year
Filters: First Letter Of Title is P and Author is Benton H. Calhoun  [Clear All Filters]
Journal Article
A. Klinefelter, Zhang, Y., Otis, B., and Calhoun, B. H., “A Programmable 34 nW/Channel Sub-Threshold Signal Band Power Extractor on a Body Sensor Node SoC”, Circuits and Systems II: Express Briefs, IEEE Transactions on, vol. 59, p. 941, 2012.
S. Li, Roy, A., and Calhoun, B. H., “A Piezoelectric Energy-Harvesting System with Parallel-SSHI Rectifier and Integrated Maximum-Power-Point Tracking”, IEEE Solid-State Circuits Letters (SSCL), Special Issue on VLSI (invited paper), 2019.
Conference Paper
K. Craig, Shakhsheer, Y., Khanna, S., Arrabi, S., Lach, J., Calhoun, B. H., and Kosonocky, S., “A Programmable Resistive Power Grid for Post-Fabrication Flexibility and Energy Tradeoffs”, in International Symposium on Low Power Electronics and Design, 2012.
L. Di, Putic, M., Lach, J., and Calhoun, B. H., “Power Switch Characterization for Fine-Grained Dynamic Voltage Scaling”, in International Conference on Computer Design, pages 605-611, 2008.
S. Li, Roy, A., and Calhoun, B. H., “A Piezoelectric Energy-Harvesting System with Parallel-SSHI Rectifier and Integrated MPPT Achieving 417% Energy-Extraction Improvement and 97% Tracking Efficiency”, in 2019 Symposium on VLSI Circuits, Kyoto, Japan, 2019.
M. Putic, Di, L., Calhoun, B. H., and Lach, andJohn, “Panoptic DVS: A Fine-Grained Dynamic Voltage Scaling Framework for Energy Scalable CMOS Design”, in International Conference on Computer Design (ICCD), 2009, pp. 491-497.
Book Chapter
B. H. Calhoun, ,, and Chandrakasan, A., “Power Gating and Dynamic Voltage Scaling”, in Leakage in Nanometer Technologies, S. Narendra and Chandrakasan, A., Eds. Springer, 2006, pp. 41-75.