Robust Low Power VLSI
VLSI Design Group

Navigation

Search This Site

Publications

Export 1 results:
[ Author(Desc)] Title Type Year
Filters: Keyword is analog synthesis  [Clear All Filters]
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 
A
T. Ajayi, Kamineni, S., Cherivirala, Y. K., Fayazi, M., Kwon, K., Saligane, M., Gupta, S., Chen, C. - H., Sylvester, D., Blaauw, D., Dreslinski, Jr, R., Calhoun, B., and Wentzloff, D. D., “An Open-source Framework for Autonomous SoC Design with Analog Block Generation”, in 28th IFIP/IEEE International Conference on Very Large Scale Integration, Salt Lake City, UT, USA. (Nominated for Best Paper Award), 2020.