Publications
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[ Author
] Title Type Year Filters: Author is Aatmesh Shrivastava [Clear All Filters]
, “A DC-DC Converter Efficiency Model for System Level Analysis in Ultra Low Power Applications”, 2013.
, “A 50nW, 100kbps Clock/Data Recovery Circuit in an FSK RF Receiver on a Body Sensor Node”, in VLSI Design Conference, 2013.
, “Modeling DC-DC Converter Efficiency and Power Management in Ultra Low Power Systems”, in Subthreshold Microelectronics Conference, 2012.
, “A 150nW, 5ppm/oC, 100kHz On-Chip Clock Source for Ultra Low Power SoCs”, in Custom Integrated Circuits Conference, San Jose, 2012.
, “A Charge Pump Based Receiver Circuit for a Voltage Scaled Interconnect”, in International Symposium on Low Power Electronics and Design, 2012.