Robust Low Power VLSI

VLSI Design Group

Search This Site

Publications

Export 1 results:

Author Title [ Type

] Year

Filters: Author is L. G. Szafaryn [Clear All Filters]

Conference Paper

M. Guevara, Marino, M. D., Meng, J., Satyamoorthy, P., Szafaryn, L. G., Wu, P., Meyer, B., Skadron, K., Lach, J., and Calhoun, B. H., “Exploiting Dynamically Changing Parallelism with a Reconfigurable Array of Homogeneous Sub-cores”, in TECHCON, 2010.