Robust Low Power VLSI

VLSI Design Group

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2010

B. H. Calhoun, Khanna, S., Zhang, Y., Ryan, J., and Otis, B., “System Design Principles Combining Sub-threshold Circuits and Architectures with Energy Scavening Mechanisms”, in International Symposium on Circuits and Systems (ISCAS), Paris, France, 2010, pp. 269-272.

2012

F. Zhang, Zhang, Y., Silver, J., Shakhsheer, Y., Nagaraju, M., Klinefelter, A., Pandey, J., Boley, J., Carlson, E., Shrivastava, A., Otis, B., and Calhoun, B., “A Batteryless 19uW MICS/ISM-Band Energy Harvesting Body Area Sensor Node SoC”, in ISSCC, San Francisco, 2012.

A. Klinefelter, Zhang, Y., Otis, B., and Calhoun, B. H., “A Programmable 34 nW/Channel Sub-Threshold Signal Band Power Extractor on a Body Sensor Node SoC”, Circuits and Systems II: Express Briefs, IEEE Transactions on, vol. 59, p. 941, 2012.

2013

A. Shrivastava, Pandey, J., Otis, B., and Calhoun, B. H., “A 50nW, 100kbps Clock/Data Recovery Circuit in an FSK RF Receiver on a Body Sensor Node”, in VLSI Design Conference, 2013.