%0 Journal Article %J IEEE Journal of Solid-State Circuits %D 2024 %T A Sub-µW Energy-Performance-Aware IoT SoC with a Triple-Mode Power Management Unit for System Performance Scaling, Fast DVFS, and Energy Minimization %A Xinjian Liu %A Sumanth Kamineni %A Jacob Breiholz %A Benton H. Calhoun %A Shuo Li %B IEEE Journal of Solid-State Circuits %G eng %0 Conference Paper %B Design, Automation and Test in Europe Conference (DATE), 2023 %D 2023 %T AuxcellGen: A Framework for Autonomous Generation of Analog and Memory Unit Cells %A Sumanth Kamineni %A Arvind Sharma %A Ramesh Harjani %A Sachin S. Sapatnekar %A Benton H. Calhoun %B Design, Automation and Test in Europe Conference (DATE), 2023 %8 04/2023 %G eng %0 Conference Paper %B IEEE International Solid-State Circuits Conference (ISSCC) %D 2022 %T A 194nW Energy-Performance-Aware IoT SoC Employing a 5.2nW 92.6% Peak Efficiency Power Management Unit for System Performance Scaling, Fast DVFS and Energy Minimization %A Xinjian Liu %A Sumanth Kamineni %A Jacob Breiholz %A Benton H. Calhoun %A Shuo Li %B IEEE International Solid-State Circuits Conference (ISSCC) %G eng %0 Conference Paper %B IEEE Custom Integrated Circuits Conference (CICC) %D 2021 %T MemGen: An Open-Source Framework for Autonomous Generation of Memory Macros %A Sumanth Kamineni %A Shourya Gupta %A Benton H. Calhoun %B IEEE Custom Integrated Circuits Conference (CICC) %G eng %0 Conference Paper %B 2020 IEEE International Symposium on Circuits and Systems (ISCAS) %D 2020 %T An 85 nW IoT Node-Controlling SoC for MELs Power-Mode Management and Phantom Energy Reduction %A Shuo Li %A Jacob Breiholz %A Sumanth Kamineni %A Jaeho Im %A David D. Wentzloff %A Benton H. Calhoun %B 2020 IEEE International Symposium on Circuits and Systems (ISCAS) %G eng %0 Conference Proceedings %B IEEE Hot Chips 32 Symposium (HCS) %D 2020 %T Fully Autonomous Mixed Signal SoC Design & Layout Generation Platform %A Tutu Ajayi %A Yaswanth K Cherivirala %A Kyumin Kwon %A Sumanth Kamineni %A Mehdi Saligane %A Morteza Fayazi %A Shourya Gupta %A Chien-Hen Chen %A Dennis Sylvester %A David Blaauw %A Ronald Dreslinski Jr %A Benton H. Calhoun %A David D. Wentzloff %B IEEE Hot Chips 32 Symposium (HCS) %8 08/2020 %G eng %0 Conference Paper %B 28th IFIP/IEEE International Conference on Very Large Scale Integration %D 2020 %T An Open-source Framework for Autonomous SoC Design with Analog Block Generation %A Tutu Ajayi %A Sumanth Kamineni %A Yaswanth K Cherivirala %A Morteza Fayazi %A Kyumin Kwon %A Mehdi Saligane %A Shourya Gupta %A Chien-Hen Chen %A Dennis Sylvester %A David Blaauw %A Ronald Dreslinski Jr %A Benton Calhoun %A David D. Wentzloff %K analog generator %K analog synthesis %K SoC generator %B 28th IFIP/IEEE International Conference on Very Large Scale Integration %C Salt Lake City, UT, USA. (Nominated for Best Paper Award) %8 10/2020 %G eng %0 Journal Article %J IEEE Solid-State Circuits Letters (SSCL) %D 2019 %T A 6–140-nW 11 Hz–8.2-kHz DVFS RISC-V Microprocessor Using Scalable Dynamic Leakage-Suppression Logic %A Daniel S. Truesdell %A Jacob Breiholz %A Sumanth Kamineni %A NingXi Liu %A Albert Magyar %A Benton H. Calhoun %B IEEE Solid-State Circuits Letters (SSCL) %8 08/2019 %G eng %U https://ieeexplore.ieee.org/document/8822384 %0 Conference Paper %B IEEE European Solid-State Circuits Conference (ESSCIRC) %D 2018 %T A 2.5 ppm/°C 1.05 MHz Relaxation Oscillator with Dynamic Frequency-Error Compensation and 8 µs Start-Up Time %A NingXi Liu %A Rishika Agarwala %A Anjana Dissanayake %A Daniel S. Truesdell %A Sumanth Kamineni %A Xing Chen %A David D. Wentzloff %A Benton H. Calhoun %B IEEE European Solid-State Circuits Conference (ESSCIRC) %C Dresden, Germany %8 09/2018 %G eng