%0 Conference Paper %B International Conference on IC Design and Technology (ICICDT) %D 2014 %T Modeling SRAM Dynamic VMIN %A Boley, J. %A V. Chandra %A R. Aitken %A B. H. Calhoun %B International Conference on IC Design and Technology (ICICDT) %8 06/2014 %G eng %0 Conference Paper %B Design Automation Conference (DAC) %D 2014 %T Self Calibrated Dynamic Write Margin Sensor for Low Power Read/Write Operations in Sub-32nm SRAM %A P. Beshay %A V. Chandra %A R. Aitken %A B. H. Calhoun %B Design Automation Conference (DAC) %G eng %0 Conference Paper %B Design Automation and Test Europe (DATE) %D 2011 %T Dynamic Write Limited Minimum Operating Voltage for Nanoscale SRAM %A S. Nalam %A V. Chandra %A R. C. Aitken %A B. H. Calhoun %B Design Automation and Test Europe (DATE) %8 03/2011 %G eng %1 Nalam_DATE2011_paper.PDF|Nalam_DATE2011_paper.PDF %0 Conference Paper %B ISQED %D 2010 %T Asymmetric 6T SRAM with Two-phase Write and Split Bitline Differential Sensing for Low Voltage Operation %A S. Nalam %A V. Chandra %A C. Pietrzyk %A R. C. Aitken %A B. H. Calhoun %B ISQED %P 139-146 %G eng %1 Nalam_ISQED2010_paper.pdf|Nalam_ISQED2010_paper.pdf