%0 Conference Paper %B IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference %D 2015 %T A 23 nW CMOS ultra-Low Power Temperature Sensor Operational from 0.2 V %A Divya Akella %A Aatmesh Shrivastava %A Benton H. Calhoun %B IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference %I IEEE %C Rohnert Park, CA %8 10/2015 %G eng %1 A 23 nW CMOS ultra-Low Power Temperature Sensor Operational from 0.2 V.pdf|A 23 nW CMOS ultra-Low Power Temperature Sensor Operational from 0.2 V.pdf %0 Conference Paper %B ISSCC %D 2015 %T A 6.45 μW Self-Powered IoT SoC with Integrated Energy-Harvesting Power Management and ULP Asymmetric Radios %A Alicia Klinefelter %A Nathan Roberts %A Yousef Shakhsheer %A Patricia Gonzalez %A Aatmesh Shrivastava %A Abhishek Roy %A Kyle Craig %A Muhammad Faisal %A James Boley %A Seunghyun Oh %A Yanqing Zhang %A Divya Akella %A David D. Wentzloff %A Benton Calhoun %B ISSCC %I IEEE %C San Francisco, CA %8 02/2015 %G eng %1 ISSCC_2015_klinefelter.pdf %0 Journal Article %J IEEE Transactions on Biomedical Circuits and Systems %D 2015 %T A 6.45μW Self-Powered SoC with Integrated Energy-Harvesting Power Management and ULP Asymmetric Radios for Portable Biomedical Systems %A Abhishek Roy %A Alicia Klinefelter %A Farah Yahya %A Xing Chen %A Patricia Gonzalez %A Christopher J Lukas %A Divya Akella %A James Boley %A Kyle Craig %A Muhammad Faisal %A Seunghyun Oh %A Nathan Roberts %A Yousef Shakhsheer %A Aatmesh Shrivastava %A Dilip Vasudevan %A David D. Wentzloff %A Benton Calhoun %B IEEE Transactions on Biomedical Circuits and Systems %V 9 %P 862-874 %8 12/2015 %G eng %1 TBioCAS2015_BSN_rev2.pdf %0 Conference Paper %B VLSI Design Conference %D 2013 %T A 50nW, 100kbps Clock/Data Recovery Circuit in an FSK RF Receiver on a Body Sensor Node %A Aatmesh Shrivastava %A Jagdish Pandey %A Brian Otis %A Benton H. Calhoun %B VLSI Design Conference %8 01/2013 %G eng %1 Shrivastava_vlsid13.pdf|Shrivastava_vlsid13.pdf %0 Journal Article %J Journal of Solid State Circuits %D 2013 %T A Batteryless 19 uW MICS/ISM-Band Energy Harvesting Body Sensor Node SoC for ExG Applications %A Yanqing Zhang %A Fan Zhang %A Yousef Shakhsheer %A Jason D. Silver %A Alicia Klinefelter %A Manohar Nagaraju %A James Boley %A Jagdish Pandey %A Aatmesh Shrivastava %A Eric J. Carlson %A Austin Wood %A Benton H. Calhoun %A Brian P. Otis %B Journal of Solid State Circuits %V 48 %P 199-213 %8 01/2013 %G eng %1 06399579.pdf|06399579.pdf %& 199 %0 Journal Article %D 2013 %T A DC-DC Converter Efficiency Model for System Level Analysis in Ultra Low Power Applications %A Aatmesh Shrivastava %A Benton H. Calhoun %X This paper presents a model of inductor based DC-DC converters that can be used to study the impact of power management techniques such as dynamic voltage and frequency scaling (DVFS). System level power models of low power systems on chip (SoCs) and power management strategies cannot be correctly established without accounting for the associated overhead related to the DC-DC converters that provide regulated power to the system. The proposed model accurately predicts the efficiency of inductor based DC-DC converters with varying topologies and control schemes across a range of output voltage and current loads. It also accounts for the energy and timing overhead associated with the change in the operating condition of the regulator. Since modern SoCs employ power management techniques that vary the voltage and current loads seen by the converter, accurate modeling of the impact on the converter efficiency becomes critical. We use this model to compute the overall cost of two power distribution strategies for a SoC with multiple voltage islands. The proposed model helps us to obtain the energy benefits of a power management technique and can also be used as a basis for comparison between power management techniques or as a tool for design space exploration early in a SoC design cycle. %8 06/2013 %G eng %U http://www.mdpi.com/2079-9268/3/3/215 %1 jlpea-03-00215-v2 (5).pdf|jlpea-03-00215-v2 (5).pdf %0 Conference Paper %B Custom Integrated Circuits Conference %D 2012 %T A 150nW, 5ppm/oC, 100kHz On-Chip Clock Source for Ultra Low Power SoCs %A Aatmesh Shrivastava %A Benton H. Calhoun %B Custom Integrated Circuits Conference %I IEEE %C San Jose %8 09/2012 %G eng %1 M-01.pdf|M-01.pdf %0 Conference Paper %B ISSCC %D 2012 %T A Batteryless 19uW MICS/ISM-Band Energy Harvesting Body Area Sensor Node SoC %A Fan Zhang %A Yanqing Zhang %A Jason Silver %A Yousef Shakhsheer %A Manohar Nagaraju %A Alicia Klinefelter %A Jagdish Pandey %A James Boley %A Eric Carlson %A Aatmesh Shrivastava %A Brian Otis %A Benton Calhoun %B ISSCC %C San Francisco %8 02/2012 %G eng %1 Zhang_ISSCC2012_Paper.pdf|Zhang_ISSCC2012_Paper.pdf %0 Conference Paper %B International Symposium on Low Power Electronics and Design %D 2012 %T A Charge Pump Based Receiver Circuit for a Voltage Scaled Interconnect %A Aatmesh Shrivastava %A John Lach %A Benton Calhoun %B International Symposium on Low Power Electronics and Design %G eng %1 aatmesh_islped12.pdf|aatmesh_islped12.pdf %0 Conference Paper %B Subthreshold Microelectronics Conference %D 2012 %T Modeling DC-DC Converter Efficiency and Power Management in Ultra Low Power Systems %A Aatmesh Shrivastava %A Benton H. Calhoun %B Subthreshold Microelectronics Conference %8 10/2012 %G eng %1 Shrivastava_sbvt12.pdf|Shrivastava_sbvt12.pdf %0 Generic %D 2011 %T A sub-threshold clock and data recovery circuit for a wireless sensor node %A Aatmesh Shrivastava %A Benton H. Calhoun %G eng