%0 Conference Paper %B 2017 IEEE Custom Integrated Circuits Conference (CICC) %D 2017 %T A 256kb 6T self-tuning SRAM with extended 0.38V–1.2V operating range using multiple read/write assists and VMIN tracking canary sensors %A A. Banerjee %A N. Liu %A H. N. Patel %A B. H. Calhoun %E J. Poulton %E C. T. Gray %B 2017 IEEE Custom Integrated Circuits Conference (CICC) %C Austin, TX, 2017 %G eng %1 CICC2017_SRAM.pdf|Banerjee_CICC2017.pdf %0 Conference Paper %B European Solid State Circuits Conference (ESSCIRC) %D 2016 %T A 55nm Ultra Low Leakage Deeply Depleted Channel Technology Optimized for Energy Minimization in Subthreshold SRAM and Logic %A H. N. Patel %A Roy, A. %A F. B. Yahya %A N. Liu %A K. Kumeno %A M. Yasuda %A A. Harada %A T. Ema %A B. H. Calhoun %B European Solid State Circuits Conference (ESSCIRC) %G eng %1 A 55nm Ultra Low Leakage Deeply Depleted Channel Technology Optimized for Energy Minimization in Subthreshold SRAM and Logic.pdf|A 55nm Ultra Low Leakage Deeply Depleted Channel Technology Optimized for Energy Minimization in Subthreshold SRAM and Logic.pdf