TY - Generic T1 - Fully Autonomous Mixed Signal SoC Design & Layout Generation Platform T2 - IEEE Hot Chips 32 Symposium (HCS) Y1 - 2020 A1 - Tutu Ajayi A1 - Yaswanth K Cherivirala A1 - Kyumin Kwon A1 - Sumanth Kamineni A1 - Mehdi Saligane A1 - Morteza Fayazi A1 - Shourya Gupta A1 - Chien-Hen Chen A1 - Dennis Sylvester A1 - David Blaauw A1 - Ronald Dreslinski Jr A1 - Benton H. Calhoun A1 - David D. Wentzloff JF - IEEE Hot Chips 32 Symposium (HCS) ER - TY - CONF T1 - An Open-source Framework for Autonomous SoC Design with Analog Block Generation T2 - 28th IFIP/IEEE International Conference on Very Large Scale Integration Y1 - 2020 A1 - Tutu Ajayi A1 - Sumanth Kamineni A1 - Yaswanth K Cherivirala A1 - Morteza Fayazi A1 - Kyumin Kwon A1 - Mehdi Saligane A1 - Shourya Gupta A1 - Chien-Hen Chen A1 - Dennis Sylvester A1 - David Blaauw A1 - Ronald Dreslinski Jr A1 - Benton Calhoun A1 - David D. Wentzloff KW - analog generator KW - analog synthesis KW - SoC generator JF - 28th IFIP/IEEE International Conference on Very Large Scale Integration CY - Salt Lake City, UT, USA. (Nominated for Best Paper Award) ER -