TY - JOUR T1 - A Sub-µW Energy-Performance-Aware IoT SoC with a Triple-Mode Power Management Unit for System Performance Scaling, Fast DVFS, and Energy Minimization JF - IEEE Journal of Solid-State Circuits Y1 - 2024 A1 - Xinjian Liu A1 - Sumanth Kamineni A1 - Jacob Breiholz A1 - Benton H. Calhoun A1 - Shuo Li ER - TY - CONF T1 - AuxcellGen: A Framework for Autonomous Generation of Analog and Memory Unit Cells T2 - Design, Automation and Test in Europe Conference (DATE), 2023 Y1 - 2023 A1 - Sumanth Kamineni A1 - Arvind Sharma A1 - Ramesh Harjani A1 - Sachin S. Sapatnekar A1 - Benton H. Calhoun JF - Design, Automation and Test in Europe Conference (DATE), 2023 ER - TY - CONF T1 - A 194nW Energy-Performance-Aware IoT SoC Employing a 5.2nW 92.6% Peak Efficiency Power Management Unit for System Performance Scaling, Fast DVFS and Energy Minimization T2 - IEEE International Solid-State Circuits Conference (ISSCC) Y1 - 2022 A1 - Xinjian Liu A1 - Sumanth Kamineni A1 - Jacob Breiholz A1 - Benton H. Calhoun A1 - Shuo Li JF - IEEE International Solid-State Circuits Conference (ISSCC) ER - TY - CONF T1 - MemGen: An Open-Source Framework for Autonomous Generation of Memory Macros T2 - IEEE Custom Integrated Circuits Conference (CICC) Y1 - 2021 A1 - Sumanth Kamineni A1 - Shourya Gupta A1 - Benton H. Calhoun JF - IEEE Custom Integrated Circuits Conference (CICC) ER - TY - CONF T1 - An 85 nW IoT Node-Controlling SoC for MELs Power-Mode Management and Phantom Energy Reduction T2 - 2020 IEEE International Symposium on Circuits and Systems (ISCAS) Y1 - 2020 A1 - Shuo Li A1 - Jacob Breiholz A1 - Sumanth Kamineni A1 - Jaeho Im A1 - David D. Wentzloff A1 - Benton H. Calhoun JF - 2020 IEEE International Symposium on Circuits and Systems (ISCAS) ER - TY - Generic T1 - Fully Autonomous Mixed Signal SoC Design & Layout Generation Platform T2 - IEEE Hot Chips 32 Symposium (HCS) Y1 - 2020 A1 - Tutu Ajayi A1 - Yaswanth K Cherivirala A1 - Kyumin Kwon A1 - Sumanth Kamineni A1 - Mehdi Saligane A1 - Morteza Fayazi A1 - Shourya Gupta A1 - Chien-Hen Chen A1 - Dennis Sylvester A1 - David Blaauw A1 - Ronald Dreslinski Jr A1 - Benton H. Calhoun A1 - David D. Wentzloff JF - IEEE Hot Chips 32 Symposium (HCS) ER - TY - CONF T1 - An Open-source Framework for Autonomous SoC Design with Analog Block Generation T2 - 28th IFIP/IEEE International Conference on Very Large Scale Integration Y1 - 2020 A1 - Tutu Ajayi A1 - Sumanth Kamineni A1 - Yaswanth K Cherivirala A1 - Morteza Fayazi A1 - Kyumin Kwon A1 - Mehdi Saligane A1 - Shourya Gupta A1 - Chien-Hen Chen A1 - Dennis Sylvester A1 - David Blaauw A1 - Ronald Dreslinski Jr A1 - Benton Calhoun A1 - David D. Wentzloff KW - analog generator KW - analog synthesis KW - SoC generator JF - 28th IFIP/IEEE International Conference on Very Large Scale Integration CY - Salt Lake City, UT, USA. (Nominated for Best Paper Award) ER - TY - JOUR T1 - A 6–140-nW 11 Hz–8.2-kHz DVFS RISC-V Microprocessor Using Scalable Dynamic Leakage-Suppression Logic JF - IEEE Solid-State Circuits Letters (SSCL) Y1 - 2019 A1 - Daniel S. Truesdell A1 - Jacob Breiholz A1 - Sumanth Kamineni A1 - NingXi Liu A1 - Albert Magyar A1 - Benton H. Calhoun UR - https://ieeexplore.ieee.org/document/8822384 ER - TY - CONF T1 - A 2.5 ppm/°C 1.05 MHz Relaxation Oscillator with Dynamic Frequency-Error Compensation and 8 µs Start-Up Time T2 - IEEE European Solid-State Circuits Conference (ESSCIRC) Y1 - 2018 A1 - NingXi Liu A1 - Rishika Agarwala A1 - Anjana Dissanayake A1 - Daniel S. Truesdell A1 - Sumanth Kamineni A1 - Xing Chen A1 - David D. Wentzloff A1 - Benton H. Calhoun JF - IEEE European Solid-State Circuits Conference (ESSCIRC) CY - Dresden, Germany ER -