TY - JOUR T1 - Two Fast Methods for Estimating the Minimum Standby Supply Voltage for Large SRAMs JF - Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) Y1 - 2010 A1 - Jiajing Wang A1 - Amith Singhee A1 - Rob A. Rutenbar A1 - Benton H. Calhoun VL - 29 U1 - 2010_WangCalhoun_TCAD.pdf|2010_WangCalhoun_TCAD.pdf ER - TY - JOUR T1 - Digital Circuit Design Challenges and Opportunities in the Era of Nanoscale CMOS JF - Proceedings of the IEEE (Special Issue on Integrated Electronics: Beyond Moore’s Law) Y1 - 2008 A1 - Benton H. Calhoun A1 - Yu Cao, Xin Li A1 - Ken Mai A1 - Lawrence T. Pileggi A1 - Rob A. Rutenbar A1 - Kenneth L. Shepard VL - 96 U1 - CalhounEtAl_IEEEProc_08.pdf|CalhounEtAl_IEEEProc_08.pdf ER - TY - CONF T1 - Recursive Statistical Blockade: An Enhanced Technique for Rare Event Simulation with Application to SRAM Circuit Design T2 - International Conference on VLSI Design, India Y1 - 2008 A1 - Amith Singhee A1 - Jiajing Wang A1 - Benton H. Calhoun A1 - Rob A. Rutenbar JF - International Conference on VLSI Design, India U1 - Singhee_VLSI2008_paper.pdf|Singhee_VLSI2008_paper.pdf ER - TY - CONF T1 - Statistical Modeling for the Minimum Standby Supply Voltage of a Full SRAM Array T2 - European Solid State Circuits Conference (ESSCIRC) Y1 - 2007 A1 - Jiajing Wang A1 - Amith Singhee A1 - Rob A. Rutenbar A1 - Benton H. Calhoun JF - European Solid State Circuits Conference (ESSCIRC) U1 - Wang_ESSCIRC07_paper.pdf|Wang_ESSCIRC07_paper.pdf ER -