TY - CONF T1 - A battery-less 507nW SoC with integrated platform power manager and SiP interfaces T2 - 2017 Symposium on VLSI Circuits Y1 - 2017 A1 - Farah Yahya A1 - Christopher J Lukas A1 - Jacob Breiholz A1 - Abhishek Roy A1 - Harsh N. Patel A1 - NingXi Liu A1 - Xing Chen A1 - Avish Kosari A1 - Shuo Li A1 - Divya Akella A1 - Oluseyi Ayorinde A1 - David D. Wentzloff A1 - Benton H. Calhoun JF - 2017 Symposium on VLSI Circuits PB - IEEE CY - Kyoto, Japan SN - 978-4-86348-614-0 U1 - PID4631669.pdf|PID4631669.pdf ER - TY - CONF T1 - Soft Errors: Reliability Challenges in Energy-Constrained ULP Body Sensor Networks Applications T2 - 23rd IEEE International Symposium on On-Line Testing and Robust System Design Y1 - 2017 A1 - Harsh N. Patel A1 - Randy W. Mann A1 - Benton H. Calhoun JF - 23rd IEEE International Symposium on On-Line Testing and Robust System Design PB - IEEE CY - Thessaloniki, Greece U1 - IOLTS_2017_Poster_Paper_Submitted.pdf|IOLTS_2017_Poster_Paper_Submitted.pdf ER - TY - CONF T1 - Subthreshold SRAM: Challenges, Design Decisions, and Solutions T2 - 60th IEEE International Midwest Symposium on Circuits and Systems Y1 - 2017 A1 - Harsh N. Patel A1 - Farah B. Yahya A1 - Benton H. Calhoun JF - 60th IEEE International Midwest Symposium on Circuits and Systems PB - IEEE CY - Boston, MA, USA U1 - MWCAS_2017_Final_IEEE_Submitted.pdf|MWCAS_2017_Final_IEEE_Submitted.pdf ER - TY - CONF T1 - Combining SRAM Read/Write Assist Techniques for Near/Sub-Threshold Voltage Operation T2 - 6th Asia Symposium on Quality Electronic Design (ASQED 2015) Y1 - 2015 A1 - Farah B. Yahya A1 - Harsh N. Patel A1 - Vikas Chandra A1 - Benton H. Calhoun JF - 6th Asia Symposium on Quality Electronic Design (ASQED 2015) CY - Kuala Lumpur, Malaysia U1 - asQED2015_Yahya_Rev5.pdf|asQED2015_Yahya_Rev5.pdf ER -