TY - CONF T1 - Modeling SRAM Dynamic VMIN T2 - International Conference on IC Design and Technology (ICICDT) Y1 - 2014 A1 - Boley, J. A1 - V. Chandra A1 - R. Aitken A1 - B. H. Calhoun JF - International Conference on IC Design and Technology (ICICDT) ER - TY - CONF T1 - Self Calibrated Dynamic Write Margin Sensor for Low Power Read/Write Operations in Sub-32nm SRAM T2 - Design Automation Conference (DAC) Y1 - 2014 A1 - P. Beshay A1 - V. Chandra A1 - R. Aitken A1 - B. H. Calhoun JF - Design Automation Conference (DAC) ER - TY - CONF T1 - Dynamic Write Limited Minimum Operating Voltage for Nanoscale SRAM T2 - Design Automation and Test Europe (DATE) Y1 - 2011 A1 - S. Nalam A1 - V. Chandra A1 - R. C. Aitken A1 - B. H. Calhoun JF - Design Automation and Test Europe (DATE) U1 - Nalam_DATE2011_paper.PDF|Nalam_DATE2011_paper.PDF ER - TY - CONF T1 - Asymmetric 6T SRAM with Two-phase Write and Split Bitline Differential Sensing for Low Voltage Operation T2 - ISQED Y1 - 2010 A1 - S. Nalam A1 - V. Chandra A1 - C. Pietrzyk A1 - R. C. Aitken A1 - B. H. Calhoun JF - ISQED U1 - Nalam_ISQED2010_paper.pdf|Nalam_ISQED2010_paper.pdf ER -