TY - CONF T1 - Statistical Modeling for the Minimum Standby Supply Voltage of a Full SRAM Array T2 - European Solid State Circuits Conference (ESSCIRC) Y1 - 2007 A1 - Jiajing Wang A1 - Amith Singhee A1 - Rob A. Rutenbar A1 - Benton H. Calhoun JF - European Solid State Circuits Conference (ESSCIRC) U1 - Wang_ESSCIRC07_paper.pdf|Wang_ESSCIRC07_paper.pdf ER -