00521nas a2200109 4500008004100000245011000041210006900151100001900220700001300239700002400252856013500276 2023 eng d00aScalable All-Analog LDOs With Reduced Input Offset Variability Using Digital Synthesis Flow in 65-nm CMOS0 aScalable AllAnalog LDOs With Reduced Input Offset Variability Us1 aGupta, Shourya1 aLi, Shuo1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/scalable-all-analog-ldos-reduced-input-offset-variability-using-digital-synthesis-flow-65-nm-cmos00664nas a2200145 4500008004100000245015500041210006900196100002600265700001700291700002000308700001900328700001300347700002400360856013400384 2022 eng d00aNanoWattch: A Self-Powered 3-nW RISC-V SoC Operable from 160mV Photovoltaic Input with Integrated Temperature Sensing and Adaptive Performance Scaling0 aNanoWattch A SelfPowered 3nW RISCV SoC Operable from 160mV Photo1 aTruesdell, Daniel, S.1 aLiu, Xinjian1 aBreiholz, Jacob1 aGupta, Shourya1 aLi, Shuo1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/nanowattch-self-powered-3-nw-risc-v-soc-operable-160mv-photovoltaic-input-integrated-temperature00398nas a2200109 4500008004100000245007400041210006900115260001200184100001900196700002400215856004900239 2021 eng d00aDynamic Read VMIN and Yield Estimation for Nanoscale SRAMs0 aDynamic Read VsubMINsub and Yield Estimation for Nanoscale SRAMs c12/20201 aGupta, Shourya1 aCalhoun, Benton, H. uhttps://ieeexplore.ieee.org/document/930918500419nas a2200097 4500008004100000245007500041210006900116100001900185700002400204856009300228 2021 eng d00aDynamic Write VMIN and Yield Estimation for Nanoscale SRAMs0 aDynamic Write VsubMINsub and Yield Estimation for Nanoscale SRAM1 aGupta, Shourya1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/dynamic-write-vmin-and-yield-estimation-nanoscale-srams00467nas a2200109 4500008004100000245008000041210006900121100002200190700001900212700002400231856010200255 2021 eng d00aMemGen: An Open-Source Framework for Autonomous Generation of Memory Macros0 aMemGen An OpenSource Framework for Autonomous Generation of Memo1 aKamineni, Sumanth1 aGupta, Shourya1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/memgen-open-source-framework-autonomous-generation-memory-macros00466nas a2200109 4500008004100000245008000041210006900121100001900190700002600209700002400235856009700259 2020 eng d00aA 65nm 16kb SRAM with 131.5pW Leakage at 0.9V for Wireless IoT Sensor Nodes0 a65nm 16kb SRAM with 1315pW Leakage at 09V for Wireless IoT Senso1 aGupta, Shourya1 aTruesdell, Daniel, S.1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/65nm-16kb-sram-1315pw-leakage-09v-wireless-iot-sensor-nodes00818nas a2200241 4500008004100000245007400041210006900115260001200184100001600196700002900212700001700241700002200258700002000280700002000300700001900320700002000339700002200359700001800381700002300399700002400422700002500446856010500471 2020 eng d00aFully Autonomous Mixed Signal SoC Design & Layout Generation Platform0 aFully Autonomous Mixed Signal SoC Design Layout Generation Platf c08/20201 aAjayi, Tutu1 aCherivirala, Yaswanth, K1 aKwon, Kyumin1 aKamineni, Sumanth1 aSaligane, Mehdi1 aFayazi, Morteza1 aGupta, Shourya1 aChen, Chien-Hen1 aSylvester, Dennis1 aBlaauw, David1 aDreslinski, Ronald1 aCalhoun, Benton, H.1 aWentzloff, David, D. uhttps://rlpvlsi.ece.virginia.edu/fully-autonomous-mixed-signal-soc-design-layout-generation-platform00979nas a2200277 4500008004100000245008400041210006900125260007100194653002100265653002100286653001800307100001600325700002200341700002900363700002000392700001700412700002000429700001900449700002000468700002200488700001800510700002300528700002000551700002500571856010500596 2020 eng d00aAn Open-source Framework for Autonomous SoC Design with Analog Block Generation0 aOpensource Framework for Autonomous SoC Design with Analog Block aSalt Lake City, UT, USA. (Nominated for Best Paper Award)c10/202010aanalog generator10aanalog synthesis10aSoC generator1 aAjayi, Tutu1 aKamineni, Sumanth1 aCherivirala, Yaswanth, K1 aFayazi, Morteza1 aKwon, Kyumin1 aSaligane, Mehdi1 aGupta, Shourya1 aChen, Chien-Hen1 aSylvester, Dennis1 aBlaauw, David1 aDreslinski, Ronald1 aCalhoun, Benton1 aWentzloff, David, D. uhttps://rlpvlsi.ece.virginia.edu/open-source-framework-autonomous-soc-design-analog-block-generation