00625nas a2200133 4500008004100000245014200041210007000183100001500253700002200268700001900290700001700309700002400326856014100350 2024 eng d00aA 2.3-5.7μW Tri-Modal Self-Adaptive Photoplethysmography Sensor Interface IC for Heart Rate, SpO2 , and Pulse Transit Time Co-Monitoring0 a2357μW TriModal SelfAdaptive Photoplethysmography Sensor Interfa1 aWang, Peng1 aAgarwala, Rishika1 aOwnby, Natalie1 aLiu, Xinjian1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/23-57%CE%BCw-tri-modal-self-adaptive-photoplethysmography-sensor-interface-ic-heart-rate-spo2-and-pulse00692nas a2200133 4500008004100000245022300041210006900264260000900333100001700342700002000359700002100379700002400400856013400424 2024 eng d00aA 6nA Fully-Autonomous Triple-Input Hybrid-Inductor-Capacitor Multi-Output Power Management System with Multi-Rail Energy Sharing, All-Rail Cold Startup, and Adaptive Conversion Control for mm-scale Distributed Systems0 a6nA FullyAutonomous TripleInput HybridInductorCapacitor MultiOut c20241 aLiu, Xinjian1 aAgrawal, Anjali1 aTanaka, Akiyoshi1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/6na-fully-autonomous-triple-input-hybrid-inductor-capacitor-multi-output-power-management-system00639nas a2200133 4500008004100000245015500041210007000196100001700266700002200283700002000305700002400325700001300349856014300362 2024 eng d00aA Sub-µW Energy-Performance-Aware IoT SoC with a Triple-Mode Power Management Unit for System Performance Scaling, Fast DVFS, and Energy Minimization0 aSubµW EnergyPerformanceAware IoT SoC with a TripleMode Power Man1 aLiu, Xinjian1 aKamineni, Sumanth1 aBreiholz, Jacob1 aCalhoun, Benton, H.1 aLi, Shuo uhttps://rlpvlsi.ece.virginia.edu/sub-%C2%B5w-energy-performance-aware-iot-soc-triple-mode-power-management-unit-system-performance-scaling00758nas a2200193 4500008004100000245010700041210007000148100002000218700001900238700002500257700002400282700001700306700002200323700001800345700002400363700002400387700002300411856013000434 2023 eng d00aA -102dBm Sensitivity, 2.2µA Packet-Level-Duty-cycled Wake-Up Receiver with ADPLL achieving -30dB SIR0 a102dBm Sensitivity 22µA PacketLevelDutycycled WakeUp Receiver wi1 aZhang, Linsheng1 aDuvvuri, Divya1 aBhattacharya, Suprio1 aDissanayake, Anjana1 aLiu, Xinjian1 aBishop, Henry, L.1 aZhang, Yaobin1 aBlalock, Travis, N.1 aCalhoun, Benton, H.1 aBowers, Steven, M. uhttps://rlpvlsi.ece.virginia.edu/102dbm-sensitivity-22%C2%B5a-packet-level-duty-cycled-wake-receiver-adpll-achieving-30db-sir00568nas a2200121 4500008004100000245012200041210007000163100001700233700001700250700001900267700002400286856013600310 2023 eng d00aA 10-Channel, 1.2 µW, Reconfigurable Capacitanceto-Digital Converter for Low-Power, Wearable Healthcare Applications0 a10Channel 12 µW Reconfigurable CapacitancetoDigital Converter fo1 aFaruqe, Omar1 aLee, Daehyun1 aOwnby, Natalie1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/10-channel-12-%C2%B5w-reconfigurable-capacitanceto-digital-converter-low-power-wearable-healthcare00610nas a2200133 4500008004100000245012500041210006900166100001700235700002000252700002400272700002000296700002400316856013600340 2023 eng d00aA 1pJ/Bit Bypass-SPI Interconnect Bus with I2C Conversion Capability and 2.3nW Standby Power for Fabric Sensing Networks0 a1pJBit BypassSPI Interconnect Bus with I2C Conversion Capability1 aLiu, Xinjian1 aChen, Zhenghong1 aMim, Nugaira, Gahan1 aAgrawal, Anjali1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/1pjbit-bypass-spi-interconnect-bus-i2c-conversion-capability-and-23nw-standby-power-fabric-sensing00823nas a2200205 4500008004100000245014000041210006900181100001700250700002600267700001700293700002600310700002100336700002100357700002000378700001700398700002400415700001700439700002400456856013700480 2023 eng d00aA 33nW Fully Autonomous SoC with Distributed Cooperative Energy Harvesting and Multi-Chip Power Management for mm-scale System-in-Fiber0 a33nW Fully Autonomous SoC with Distributed Cooperative Energy Ha1 aLiu, Xinjian1 aTruesdell, Daniel, S.1 aFaruqe, Omar1 aParameswaran, Lalitha1 aRickley, Michael1 aKopanski, Andrew1 aCantley, Lauren1 aCoon, Austin1 aBernasconi, Matthew1 aWang, Tairan1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/33nw-fully-autonomous-soc-distributed-cooperative-energy-harvesting-and-multi-chip-power-management00575nas a2200145 4500008004100000245008600041210006900127260001200196100002200208700001900230700002000249700002700269700002400296856010900320 2023 eng d00aAuxcellGen: A Framework for Autonomous Generation of Analog and Memory Unit Cells0 aAuxcellGen A Framework for Autonomous Generation of Analog and M c04/20231 aKamineni, Sumanth1 aSharma, Arvind1 aHarjani, Ramesh1 aSapatnekar, Sachin, S.1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/auxcellgen-framework-autonomous-generation-analog-and-memory-unit-cells00521nas a2200109 4500008004100000245011000041210006900151100001900220700001300239700002400252856013500276 2023 eng d00aScalable All-Analog LDOs With Reduced Input Offset Variability Using Digital Synthesis Flow in 65-nm CMOS0 aScalable AllAnalog LDOs With Reduced Input Offset Variability Us1 aGupta, Shourya1 aLi, Shuo1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/scalable-all-analog-ldos-reduced-input-offset-variability-using-digital-synthesis-flow-65-nm-cmos00824nas a2200217 4500008004100000245012200041210006900163260000900232100001700241700002600258700001700284700002600301700002100327700002100348700002000369700001700389700002400406700001700430700002400447856013500471 2023 eng d00aA Self-Powered SoC with Distributed Cooperative Energy Harvesting and Multi-Chip Power Management for System-in-Fiber0 aSelfPowered SoC with Distributed Cooperative Energy Harvesting a c20231 aLiu, Xinjian1 aTruesdell, Daniel, S.1 aFaruqe, Omar1 aParameswaran, Lalitha1 aRickley, Michael1 aKopanski, Andrew1 aCantley, Lauren1 aCoon, Austin1 aBernasconi, Matthew1 aWang, Tairan1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/self-powered-soc-distributed-cooperative-energy-harvesting-and-multi-chip-power-management-system00779nas a2200193 4500008004100000245012500041210006900166100002000235700001900255700002200274700002200296700001700318700002400335700001800359700002400377700002400401700002300425856013700448 2022 eng d00aA 184 nW, -78.3 dBm Sensitivity Antenna-Coupled Supply, Temperature, and Interference-Robust Wake-up Receiver at 4.9 GHz0 a184 nW 783 dBm Sensitivity AntennaCoupled Supply Temperature and1 aShen, Xiaochuan1 aDuvvuri, Divya1 aBassirian, Pouyan1 aBishop, Henry, L.1 aLiu, Xinjian1 aDissanayake, Anjana1 aZhang, Yaobin1 aBlalock, Travis, N.1 aCalhoun, Benton, H.1 aBowers, Steven, M. uhttps://rlpvlsi.ece.virginia.edu/184-nw-783-dbm-sensitivity-antenna-coupled-supply-temperature-and-interference-robust-wake-receiver00648nas a2200133 4500008004100000245017500041210006900216100001700285700002200302700002000324700002400344700001300368856013300381 2022 eng d00aA 194nW Energy-Performance-Aware IoT SoC Employing a 5.2nW 92.6% Peak Efficiency Power Management Unit for System Performance Scaling, Fast DVFS and Energy Minimization0 a194nW EnergyPerformanceAware IoT SoC Employing a 52nW 926 Peak E1 aLiu, Xinjian1 aKamineni, Sumanth1 aBreiholz, Jacob1 aCalhoun, Benton, H.1 aLi, Shuo uhttps://rlpvlsi.ece.virginia.edu/194nw-energy-performance-aware-iot-soc-employing-52nw-926-peak-efficiency-power-management-unit00596nas a2200109 4500008004100000245019400041210006900235100001300304700001700317700002400334856012800358 2022 eng d00aA 32nA Fully Autonomous Multi-Input Single-Inductor Multi-Output Energy Harvesting and Power Management Platform with 1.2×10^5 Dynamic Range, Integrated MPPT, and Multi-Modal Cold Start-Up0 a32nA Fully Autonomous MultiInput SingleInductor MultiOutput Ener1 aLi, Shuo1 aLiu, Xinjian1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/32na-fully-autonomous-multi-input-single-inductor-multi-output-energy-harvesting-and-power00564nas a2200109 4500008004100000245015500041210006900196100001300265700001700278700002400295856013500319 2022 eng d00aA 956pW Switched-Capacitor Sub-Bandgap Reference with 0.44-to-3.3V Supply Range, -67dB PSRR, and 0.2% within-Wafer Inaccuracy for Nanowatt IoT Systems0 a956pW SwitchedCapacitor SubBandgap Reference with 044to33V Suppl1 aLi, Shuo1 aLiu, Xinjian1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/956pw-switched-capacitor-sub-bandgap-reference-044-33v-supply-range-67db-psrr-and-02-within-wafer00486nas a2200109 4500008004100000245008700041210006900128100001900197700002000216700002400236856011600260 2022 eng d00aModeling Energy Aware Photoplethsmography for Personalized Healthcare Applications0 aModeling Energy Aware Photoplethsmography for Personalized Healt1 aOwnby, Natalie1 aFlynn, Katheryn1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/modeling-energy-aware-photoplethsmography-personalized-healthcare-applications00664nas a2200145 4500008004100000245015500041210006900196100002600265700001700291700002000308700001900328700001300347700002400360856013400384 2022 eng d00aNanoWattch: A Self-Powered 3-nW RISC-V SoC Operable from 160mV Photovoltaic Input with Integrated Temperature Sensing and Adaptive Performance Scaling0 aNanoWattch A SelfPowered 3nW RISCV SoC Operable from 160mV Photo1 aTruesdell, Daniel, S.1 aLiu, Xinjian1 aBreiholz, Jacob1 aGupta, Shourya1 aLi, Shuo1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/nanowattch-self-powered-3-nw-risc-v-soc-operable-160mv-photovoltaic-input-integrated-temperature00527nas a2200109 4500008004100000245012400041210006900165100001700234700002400251700001300275856012900288 2022 eng d00aA Sub-nW 93% Peak Efficiency Buck Converter with Wide Dynamic Range, Fast DVFS, and Asynchronous Load-Transient Control0 aSubnW 93 Peak Efficiency Buck Converter with Wide Dynamic Range 1 aLiu, Xinjian1 aCalhoun, Benton, H.1 aLi, Shuo uhttps://rlpvlsi.ece.virginia.edu/sub-nw-93-peak-efficiency-buck-converter-wide-dynamic-range-fast-dvfs-and-asynchronous-load00568nas a2200109 4500008004100000245014300041210007000184100002600254700001300280700002400293856014100317 2021 eng d00aA 0.5V 560-kHz 18.8-fJ/Cycle On-Chip Oscillator with 96.1-ppm/°C Steady-State Stability Using a Duty-Cycled Digital Frequency-Locked Loop0 a05V 560kHz 188fJCycle OnChip Oscillator with 961ppm°C SteadyStat1 aTruesdell, Daniel, S.1 aLi, Shuo1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/05v-560-khz-188-fjcycle-chip-oscillator-961-ppm%C2%B0c-steady-state-stability-using-duty-cycled-digital00609nas a2200133 4500008004100000245012600041210006900167100002200236700001500258700002100273700002400294700002400318856013300342 2021 eng d00aA 0.6V 785-nW Multimodal Sensor Interface IC for Ozone Pollutant Sensing and Correlated Cardiovascular Disease Monitoring0 a06V 785nW Multimodal Sensor Interface IC for Ozone Pollutant Sen1 aAgarwala, Rishika1 aWang, Peng1 aBishop, Henry, L1 aDissanayake, Anjana1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/06v-785-nw-multimodal-sensor-interface-ic-ozone-pollutant-sensing-and-correlated-cardiovascular00507nas a2200121 4500008004100000245007800041210006900119100002400188700002200212700002300234700002400257856010400281 2021 eng d00aA 2.4 GHz-91.5 dBm Sensitivity Within-Packet Duty-Cycled Wake-Up Receiver0 a24 GHz915 dBm Sensitivity WithinPacket DutyCycled WakeUp Receive1 aDissanayake, Anjana1 aBishop, Henry, L.1 aBowers, Steven, M.1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/24-ghz-915-dbm-sensitivity-within-packet-duty-cycled-wake-receiver00828nas a2200217 4500008004100000245012900041210006900170260001600239100001900255700001300274700001800287700002200305700001700327700002000344700002400364700001800388700002000406700002400426700002300450856013700473 2021 eng d00aA 366 nW, -74.5 dBm Sensitivity Antenna-Coupled Wakeup Receiver at 4.9 GHz with Integrated Voltage Regulation and References0 a366 nW 745 dBm Sensitivity AntennaCoupled Wakeup Receiver at 49 aAtlanta, GA1 aDuvvuri, Divya1 aShen, X.1 aBassirian, P.1 aBishop, Henry, L.1 aLiu, Xinjian1 aChen, Chien-Hen1 aDissanayake, Anjana1 aZhang, Yaobin1 aBlalock, T., N.1 aCalhoun, Benton, H.1 aBowers, Steven, M. uhttps://rlpvlsi.ece.virginia.edu/366-nw-745-dbm-sensitivity-antenna-coupled-wakeup-receiver-49-ghz-integrated-voltage-regulation-and00537nas a2200109 4500008004100000245012100041210007000162100002200232700001500254700002400269856013400293 2021 eng d00aA 405nW/4.8μW Event-Driven Multi-Modal (V/I/R/C) Sensor Interface for Physiological and Environmental Co-Monitoring0 a405nW48μW EventDriven MultiModal VIRC Sensor Interface for Physi1 aAgarwala, Rishika1 aWang, Peng1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/405nw48%CE%BCw-event-driven-multi-modal-virc-sensor-interface-physiological-and-environmental-co00575nas a2200121 4500008004100000245013600041210007000177260001200247100001700259700001300276700002400289856014000313 2021 eng d00aAn 802pW 93% Peak Efficiency Buck Converter with 5.5×106 Dynamic Range Featuring Fast DVFS and Asynchronous Load-Transient Control0 a802pW 93 Peak Efficiency Buck Converter with 55×106 Dynamic Rang c09/20211 aLiu, Xinjian1 aLi, Shuo1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/802pw-93-peak-efficiency-buck-converter-55%C3%97106-dynamic-range-featuring-fast-dvfs-and-asynchronous00578nas a2200145 4500008004100000245008700041210006900128100001500197700002400212700001300236700002600249700002400275700002500299856010800324 2021 eng d00aA Crystal-Less BLE Transmitter with Clock Recovery from GFSK-Modulated BLE Packets0 aCrystalLess BLE Transmitter with Clock Recovery from GFSKModulat1 aChen, Xing1 aAlghaihab, Abdullah1 aShi, Yao1 aTruesdell, Daniel, S.1 aCalhoun, Benton, H.1 aWentzloff, David, D. uhttps://rlpvlsi.ece.virginia.edu/crystal-less-ble-transmitter-clock-recovery-gfsk-modulated-ble-packets00398nas a2200109 4500008004100000245007400041210006900115260001200184100001900196700002400215856004900239 2021 eng d00aDynamic Read VMIN and Yield Estimation for Nanoscale SRAMs0 aDynamic Read VsubMINsub and Yield Estimation for Nanoscale SRAMs c12/20201 aGupta, Shourya1 aCalhoun, Benton, H. uhttps://ieeexplore.ieee.org/document/930918500419nas a2200097 4500008004100000245007500041210006900116100001900185700002400204856009300228 2021 eng d00aDynamic Write VMIN and Yield Estimation for Nanoscale SRAMs0 aDynamic Write VsubMINsub and Yield Estimation for Nanoscale SRAM1 aGupta, Shourya1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/dynamic-write-vmin-and-yield-estimation-nanoscale-srams00562nas a2200145 4500008004100000245006800041210006700109100001900176700003000195700002600225700002400251700002100275700001900296856010100315 2021 eng d00aGraph Coloring using Coupled Oscillator-based Dynamical Systems0 aGraph Coloring using Coupled Oscillatorbased Dynamical Systems1 aMallick, Antik1 aBashar, Mohammad, Khairul1 aTruesdell, Daniel, S.1 aCalhoun, Benton, H.1 aJoshi, Siddharth1 aShukla, Nikhil uhttps://rlpvlsi.ece.virginia.edu/graph-coloring-using-coupled-oscillator-based-dynamical-systems00648nas a2200133 4500008004100000245012100041210006900162260005000231100002300281700002500304700002300329700002400352856013800376 2021 eng d00aAn Integrated 2.4GHz -91.5dBm Sensitivity Within-Packet Duty-Cycled Wake-Up Receiver Achieving 2μW at 100ms Latency0 aIntegrated 24GHz 915dBm Sensitivity WithinPacket DutyCycled Wake aSan Francisco, CA (*Equally-Credited Authors)1 aBishop*, Henry, L.1 aDissanayake*, Anjana1 aBowers, Steven, M.1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/integrated-24ghz-915dbm-sensitivity-within-packet-duty-cycled-wake-receiver-achieving-2%CE%BCw-100ms00467nas a2200109 4500008004100000245008000041210006900121100002200190700001900212700002400231856010200255 2021 eng d00aMemGen: An Open-Source Framework for Autonomous Generation of Memory Macros0 aMemGen An OpenSource Framework for Autonomous Generation of Memo1 aKamineni, Sumanth1 aGupta, Shourya1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/memgen-open-source-framework-autonomous-generation-memory-macros00565nas a2200121 4500008004100000245012100041210006900162100002000231700001900251700001500270700002400285856013400309 2021 eng d00aModeling Energy-Aware Photoplethysmography Hardware for Personalized Health Care Applications Across Skin Phototypes0 aModeling EnergyAware Photoplethysmography Hardware for Personali1 aFlynn, Katheryn1 aOwnby, Natalie1 aWang, Peng1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/modeling-energy-aware-photoplethysmography-hardware-personalized-health-care-applications-across00513nas a2200121 4500008004100000245008500041210006900126260001200195100002400207700002300231700002400254856011300278 2021 eng d00aStacked Transconductance Boosting for Ultra-Low Power 2.4GHz RF Front-End Design0 aStacked Transconductance Boosting for UltraLow Power 24GHz RF Fr c05/20211 aDissanayake, Anjana1 aBowers, Steven, M.1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/stacked-transconductance-boosting-ultra-low-power-24ghz-rf-front-end-design00592nas a2200121 4500008004100000245014900041210006900190260000900259100002600268700001300294700002400307856013900331 2020 eng d00aA 0.5V 560kHz 18.8fJ/Cycle Ultra-Low Energy Oscillator in 65nm CMOS with 96.1ppm/°C Stability Using a Duty-Cycled Digital Frequency-Locked Loop0 a05V 560kHz 188fJCycle UltraLow Energy Oscillator in 65nm CMOS wi c20201 aTruesdell, Daniel, S.1 aLi, Shuo1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/05v-560khz-188fjcycle-ultra-low-energy-oscillator-65nm-cmos-961ppm%C2%B0c-stability-using-duty-cycled00777nas a2200193 4500008004100000245012600041210007000167100002400237700001700261700002200278700002600300700002100326700001600347700001600363700001800379700002400397700002300421856013900444 2020 eng d00aA -108dBm Sensitivity, -28dB SIR, 130nW to 41μW, Digitally Reconfigurable Bit-Level Duty-Cycled Wakeup and Data Receiver0 a108dBm Sensitivity 28dB SIR 130nW to 41μW Digitally Reconfigurab1 aDissanayake, Anjana1 aMoody, Jesse1 aBishop, Henry, L.1 aTruesdell, Daniel, S.1 aMuhlbauer, Henry1 aLu, Ruochen1 aGao, Anming1 aGong, Songbin1 aCalhoun, Benton, H.1 aBowers, Steven, M. uhttps://rlpvlsi.ece.virginia.edu/108dbm-sensitivity-28db-sir-130nw-41%CE%BCw-digitally-reconfigurable-bit-level-duty-cycled-wakeup-and00466nas a2200109 4500008004100000245008000041210006900121100001900190700002600209700002400235856009700259 2020 eng d00aA 65nm 16kb SRAM with 131.5pW Leakage at 0.9V for Wireless IoT Sensor Nodes0 a65nm 16kb SRAM with 1315pW Leakage at 09V for Wireless IoT Senso1 aGupta, Shourya1 aTruesdell, Daniel, S.1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/65nm-16kb-sram-1315pw-leakage-09v-wireless-iot-sensor-nodes00611nas a2200133 4500008004100000245012800041210006900169100001500238700002200253700002200275700002400297700002400321856013200345 2020 eng d00aA 785nW Multimodal (V/I/R) Sensor Interface IC for Ozone Pollutant Sensing and Correlated Cardiovascular Disease Monitoring0 a785nW Multimodal VIR Sensor Interface IC for Ozone Pollutant Sen1 aWang, Peng1 aAgarwala, Rishika1 aBishop, Henry, L.1 aDissanayake, Anjana1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/785nw-multimodal-vir-sensor-interface-ic-ozone-pollutant-sensing-and-correlated-cardiovascular00596nas a2200145 4500008004100000245009800041210006900139100001300208700002000221700002200241700001400263700002500277700002400302856012400326 2020 eng d00aAn 85 nW IoT Node-Controlling SoC for MELs Power-Mode Management and Phantom Energy Reduction0 a85 nW IoT NodeControlling SoC for MELs PowerMode Management and 1 aLi, Shuo1 aBreiholz, Jacob1 aKamineni, Sumanth1 aIm, Jaeho1 aWentzloff, David, D.1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/85-nw-iot-node-controlling-soc-mels-power-mode-management-and-phantom-energy-reduction00555nas a2200145 4500008004100000245007900041210006900120100002200189700001500211700002300226700001800249700001700267700002400284856010100308 2020 eng d00aAn 88.6nW Ozone Pollutant Sensing Interface IC with a 159 dB Dynamic Range0 a886nW Ozone Pollutant Sensing Interface IC with a 159 dB Dynamic1 aAgarwala, Rishika1 aWang, Peng1 aTanneeru, Akhilesh1 aLee, Bongmook1 aMisra, Veena1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/886nw-ozone-pollutant-sensing-interface-ic-159-db-dynamic-range00537nas a2200109 4500008004100000245012400041210006900165100002200234700001500256700002400271856013200295 2020 eng d00aApplication-Driven Model of a PPG Sensing Modality for the Informed Design of Self-Powered, Wearable Healthcare Systems0 aApplicationDriven Model of a PPG Sensing Modality for the Inform1 aBishop, Henry, L.1 aWang, Peng1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/application-driven-model-ppg-sensing-modality-informed-design-self-powered-wearable-healthcare00558nas a2200145 4500008004100000245007700041210006900118260001200187100002200199700002600221700001600247700002400263700002000287856010500307 2020 eng d00aA comprehensive analysis of Auger generation impacted planar Tunnel FETs0 acomprehensive analysis of Auger generation impacted planar Tunne c02/20201 aAhmed, Sheikh, Z.1 aTruesdell, Daniel, S.1 aTan, Yaohua1 aCalhoun, Benton, H.1 aGhosh, Avik, W. uhttps://rlpvlsi.ece.virginia.edu/comprehensive-analysis-auger-generation-impacted-planar-tunnel-fets00689nas a2200157 4500008004100000245014700041210006900188260001200257100002400269700001500293700001300308700002600321700002400347700002500371856013500396 2020 eng d00aA Crystal-Less BLE Transmitter with -86dBm Frequency-Hopping Back-Channel WRX and Over-the-Air Clock Recovery from a GFSK-Modulated BLE Packet0 aCrystalLess BLE Transmitter with 86dBm FrequencyHopping BackChan c02/20201 aAlghaihab, Abdullah1 aChen, Xing1 aShi, Yao1 aTruesdell, Daniel, S.1 aCalhoun, Benton, H.1 aWentzloff, David, D. uhttps://rlpvlsi.ece.virginia.edu/crystal-less-ble-transmitter-86dbm-frequency-hopping-back-channel-wrx-and-over-air-clock-recovery00818nas a2200241 4500008004100000245007400041210006900115260001200184100001600196700002900212700001700241700002200258700002000280700002000300700001900320700002000339700002200359700001800381700002300399700002400422700002500446856010500471 2020 eng d00aFully Autonomous Mixed Signal SoC Design & Layout Generation Platform0 aFully Autonomous Mixed Signal SoC Design Layout Generation Platf c08/20201 aAjayi, Tutu1 aCherivirala, Yaswanth, K1 aKwon, Kyumin1 aKamineni, Sumanth1 aSaligane, Mehdi1 aFayazi, Morteza1 aGupta, Shourya1 aChen, Chien-Hen1 aSylvester, Dennis1 aBlaauw, David1 aDreslinski, Ronald1 aCalhoun, Benton, H.1 aWentzloff, David, D. uhttps://rlpvlsi.ece.virginia.edu/fully-autonomous-mixed-signal-soc-design-layout-generation-platform00510nas a2200121 4500008004100000245007900041210006900120100002600189700002200215700002000237700002400257856010700281 2020 eng d00aMinimum-Energy Digital Computing with Steep Subthreshold Swing Tunnel FETs0 aMinimumEnergy Digital Computing with Steep Subthreshold Swing Tu1 aTruesdell, Daniel, S.1 aAhmed, Sheikh, Z.1 aGhosh, Avik, W.1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/minimum-energy-digital-computing-steep-subthreshold-swing-tunnel-fets00578nas a2200145 4500008004100000245008100041210006900122100002400191700002200215700001700237700002100254700002400275700002300299856011000322 2020 eng d00aA Multichannel, MEMS-less -99dBm 260nW Bit-level Duty Cycled Wakeup Receiver0 aMultichannel MEMSless 99dBm 260nW Bitlevel Duty Cycled Wakeup Re1 aDissanayake, Anjana1 aBishop, Henry, L.1 aMoody, Jesse1 aMuhlbauer, Henry1 aCalhoun, Benton, H.1 aBowers, Steven, M. uhttps://rlpvlsi.ece.virginia.edu/multichannel-mems-less-99dbm-260nw-bit-level-duty-cycled-wakeup-receiver00543nas a2200097 4500008004100000245014700041210006900188100002600257700002400283856013800307 2020 eng d00aA Single-Supply 6-Transistor Voltage Level Converter Design Reaching 8.18-fJ/Transition at 0.3-1.2-V Range or 44-fW Leakage at 0.8-2.5-V Range0 aSingleSupply 6Transistor Voltage Level Converter Design Reaching1 aTruesdell, Daniel, S.1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/single-supply-6-transistor-voltage-level-converter-design-reaching-818-fjtransition-03-12-v-range-or00528nas a2200109 4500008004100000245012400041210006900165260001200234100001300246700002400259856013500283 2020 eng d00aSub-microAmp Energy Harvesting and Power Management Units for Self-Powered IoT SoCs: Analog vs. Digital Implementations0 aSubmicroAmp Energy Harvesting and Power Management Units for Sel c03/20201 aLi, Shuo1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/sub-microamp-energy-harvesting-and-power-management-units-self-powered-iot-socs-analog-vs-digital00576nas a2200157 4500008004100000245007200041210006600113260001200179100002200191700001900213700002600232700001600258700002400274700002300298856009700321 2020 eng d00aA Temperature-robust 27.6nW -65dBm Wakeup Receiver at 9.6GHz X Band0 aTemperaturerobust 276nW 65dBm Wakeup Receiver at 96GHz X Band c02/20201 aBassirian, Pouyan1 aDuvvuri, Divya1 aTruesdell, Daniel, S.1 aLiu, NingXi1 aCalhoun, Benton, H.1 aBowers, Steven, M. uhttps://rlpvlsi.ece.virginia.edu/temperature-robust-276nw-65dbm-wakeup-receiver-96ghz-x-band00557nas a2200145 4500008004100000245007400041210006900115100001900184700001900203700002600222700002400248700002000272700001900292856010000311 2020 eng d00aUsing synchronized oscillators to compute the maximum independent set0 aUsing synchronized oscillators to compute the maximum independen1 aMallick, Antik1 aBashar, M., K.1 aTruesdell, Daniel, S.1 aCalhoun, Benton, H.1 aJoshi, Siddarth1 aShukla, Nikhil uhttps://rlpvlsi.ece.virginia.edu/using-synchronized-oscillators-compute-maximum-independent-set00554nas a2200121 4500008004100000245010700041210006900148260001200217100002600229700002400255700002400279856012900303 2019 eng d00aA 0.6-V 44.6-fJ/Cycle Energy-Optimized Frequency-Locked Loop in 65-nm CMOS With 20.3-ppm/°C Stability0 a06V 446fJCycle EnergyOptimized FrequencyLocked Loop in 65nm CMOS c10/20191 aTruesdell, Daniel, S.1 aDissanayake, Anjana1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/06-v-446-fjcycle-energy-optimized-frequency-locked-loop-65-nm-cmos-203-ppm%C2%B0c-stability00760nas a2200229 4500008004100000245006700041210006100108260003200169100001700201700002400218700001800242700001600260700001600276700001900292700001600311700002600327700001800353700001800371700002400389700002300413856009400436 2019 eng d00aA -106dBm 33nW Bit-Level Duty-Cycled Tuned RF Wake-up Receiver0 a106dBm 33nW BitLevel DutyCycled Tuned RF Wakeup Receiver aKyoto, JapanbIEEEc06/20191 aMoody, Jesse1 aDissanayake, Anjana1 aBishop, Henry1 aLu, Ruochen1 aLiu, NingXi1 aDuvvuri, Divya1 aGao, Anming1 aTruesdell, Daniel, S.1 aBarker, Scott1 aGong, Songbin1 aCalhoun, Benton, H.1 aBowers, Steven, M. uhttps://rlpvlsi.ece.virginia.edu/106dbm-33nw-bit-level-duty-cycled-tuned-rf-wake-receiver00670nas a2200157 4500008004100000245011400041210007000155260001200225100001600237700002200253700002400275700002600299700002300325700002400348856014000372 2019 eng d00aA 2.5 ppm/°C 1.05 MHz Relaxation Oscillator with Dynamic Frequency-Error Compensation and Fast Start-Up Time0 a25 ppm°C 105 MHz Relaxation Oscillator with Dynamic FrequencyErr c06/20191 aLiu, NingXi1 aAgarwala, Rishika1 aDissanayake, Anjana1 aTruesdell, Daniel, S.1 aKamineni, Summanth1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/25-ppm%C2%B0c-105-mhz-relaxation-oscillator-dynamic-frequency-error-compensation-and-fast-start-time-000532nas a2200109 4500008004100000245010100041210006900142260003000211100002600241700002400267856013100291 2019 eng d00aA 640 pW 22 pJ/sample Gate Leakage-Based Digital CMOS Temperature Sensor with 0.25°C Resolution0 a640 pW 22 pJsample Gate LeakageBased Digital CMOS Temperature Se aAustin, TXbIEEEc04/20191 aTruesdell, Daniel, S.1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/640-pw-22-pjsample-gate-leakage-based-digital-cmos-temperature-sensor-025%C2%B0c-resolution-100569nas a2200157 4500008004100000245010900041210007300150260001200223100002600235700002000261700002200281700001600303700001900319700002400338856004900362 2019 eng d00aA 6–140-nW 11 Hz–8.2-kHz DVFS RISC-V Microprocessor Using Scalable Dynamic Leakage-Suppression Logic0 a6–140nW 11 Hz–82kHz DVFS RISCV Microprocessor Using Scalable Dyn c08/20191 aTruesdell, Daniel, S.1 aBreiholz, Jacob1 aKamineni, Sumanth1 aLiu, NingXi1 aMagyar, Albert1 aCalhoun, Benton, H. uhttps://ieeexplore.ieee.org/document/882238400612nas a2200109 4500008004100000245018500041210006900226260003100295100001300326700002400339856013900363 2019 eng d00aA 745pA Hybrid Asynchronous Binary-Searching and Synchronous Linear-Searching Digital LDO with 3.8×105 Dynamic Load Range, 99.99% Current Efficiency, and 2mV Output Voltage Ripple0 a745pA Hybrid Asynchronous BinarySearching and Synchronous Linear aSan Francisco, CAc02/20191 aLi, Shuo1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/745pa-hybrid-asynchronous-binary-searching-and-synchronous-linear-searching-digital-ldo-38%C3%97105-000521nas a2200109 4500008004100000245011500041210006900156260001200225100002100237700002400258856012900282 2019 eng d00aA Double Pumped Single-Line-Cache SRAM Architecture for Ultra-low Energy IoT and Machine Learning Applications0 aDouble Pumped SingleLineCache SRAM Architecture for Ultralow Ene c01/20191 aBanerjee, Arijit1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/double-pumped-single-line-cache-sram-architecture-ultra-low-energy-iot-and-machine-learning00856nas a2200229 4500008004100000245013100041210006900172260001200241100001700253700002400270700002100294700001600315700001600331700001900347700001600366700002600382700001800408700001800426700002400444700002300468856013500491 2019 eng d00aA Highly Re-configurable Bit-level Duty Cycled TRF Receiver Achieving -106 dBm Sensitivity and 33 nW Average Power Consumption0 aHighly Reconfigurable Bitlevel Duty Cycled TRF Receiver Achievin c11/20191 aMoody, Jesse1 aDissanayake, Anjana1 aBishop, Henry, L1 aLu, Ruochen1 aLiu, NingXi1 aDuvvuri, Divya1 aGao, Anming1 aTruesdell, Daniel, S.1 aBarker, Scott1 aGong, Songbin1 aCalhoun, Benton, H.1 aBowers, Steven, M. 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Benton, H.1 aWentzloff, David, D. uhttps://rlpvlsi.ece.virginia.edu/05-v-68-nw-ecg-monitoring-analog-front-end-arrhythmia-diagnosis-000757nas a2200181 4500008004100000245011500041210007000156260003000226100001600256700002200272700002400294700002600318700002200344700001500366700002500381700002400406856014500430 2018 eng d00aA 2.5 ppm/°C 1.05 MHz Relaxation Oscillator with Dynamic Frequency-Error Compensation and 8 µs Start-Up Time0 a25 ppm°C 105 MHz Relaxation Oscillator with Dynamic FrequencyErr aDresden, Germanyc09/20181 aLiu, NingXi1 aAgarwala, Rishika1 aDissanayake, Anjana1 aTruesdell, Daniel, S.1 aKamineni, Sumanth1 aChen, Xing1 aWentzloff, David, D.1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/25-ppm%C2%B0c-105-mhz-relaxation-oscillator-dynamic-frequency-error-compensation-and-8-%C2%B5s-start-time-000696nas a2200169 4500008004100000245011300041210007000154260001200224100001500236700002000251700002100271700002600292700001800318700002400336700002500360856014100385 2018 eng d00aA 486 µW All-Digital Bluetooth Low Energy Transmitter with Ring Oscillator Based ADPLL for IoT applications0 a486 µW AllDigital Bluetooth Low Energy Transmitter with Ring Osc c06/20181 aChen, Xing1 aBreiholz, Jacob1 aYahya, Farah, B.1 aLukas, Christopher, J1 aKim, Hun-Seok1 aCalhoun, Benton, H.1 aWentzloff, David, D. uhttps://rlpvlsi.ece.virginia.edu/486-%C2%B5w-all-digital-bluetooth-low-energy-transmitter-ring-oscillator-based-adpll-iot-applications-000628nas a2200181 4500008004100000245006800041210006400109260001800173100001700191700002200208700001800230700001600248700002300264700001800287700002400305700002300329856009400352 2018 eng d00aA -76dBm 7.4 nW wakeup radio with automatic offset compensation0 a76dBm 74 nW wakeup radio with automatic offset compensation bIEEEc02-20181 aMoody, Jesse1 aBassirian, Pouyan1 aRoy, Abhishek1 aLiu, NingXi1 aPancrazio, Stephen1 aBarker, Scott1 aCalhoun, Benton, H.1 aBowers, Steven, M. uhttps://rlpvlsi.ece.virginia.edu/76dbm-74-nw-wakeup-radio-automatic-offset-compensation-000484nas a2200109 4500008004100000245008700041210006900128260001200197100002600209700002400235856011500259 2018 eng d00aChannel Length Sizing for Power Minimization in Leakage-Dominated Digital Circuits0 aChannel Length Sizing for Power Minimization in LeakageDominated c10/20181 aTruesdell, Daniel, S.1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/channel-length-sizing-power-minimization-leakage-dominated-digital-circuits-000472nas a2200121 4500008004100000245006500041210006300106260003100169100002200200700001100222700002400233856009300257 2018 eng d00aFGC: A Tool-flow for Generating and Configuring Custom FPGAs0 aFGC A Toolflow for Generating and Configuring Custom FPGAs aMonterey, CAbACMc02/20181 aAyorinde, Oluseyi1 aQi, He1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/fgc-tool-flow-generating-and-configuring-custom-fpgas-000696nas a2200157 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https://aip.scitation.org/doi/full/10.1063/1.5044434
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SelfPowered Systems for c06/20181 aYahya, Farah, B.1 aLukas, Christopher, J1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/top-down-approach-building-battery-less-self-powered-systems-internet-things-000520nas a2200121 4500008004100000245008200041210006900123260002900192100002600221700002100247700002400268856010600292 2018 eng d00aAn Ultra-low Power System On Chip Enabling DVS with SR Level Shifting Latches0 aUltralow Power System On Chip Enabling DVS with SR Level Shiftin aFlorence, Italyc05/20181 aLukas, Christopher, J1 aYahya, Farah, B.1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/ultra-low-power-system-chip-enabling-dvs-sr-level-shifting-latches-000701nas a2200169 4500008004100000245011500041210006900156260003500225100002000260700001700280700002600297700001500323700001700338700002100355700002400376856013100400 2017 eng d00aA 4.4 nW Lossless Sensor Data Compression Accelerator for 2.9x System Power Reduction in Wireless Body Sensors0 a44 nW Lossless Sensor Data Compression Accelerator for 29x Syste aBoston, MA, USAbIEEEc08/20171 aBreiholz, Jacob1 aYahya, Farah1 aLukas, Christopher, J1 aChen, Xing1 aLeach, Kevin1 aWentzloff, David1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/44-nw-lossless-sensor-data-compression-accelerator-29x-system-power-reduction-wireless-body-000529nas a2200109 4500008004100000245010600041210006900147260002300216100001800239700002400257856013800281 2017 eng d00aA 71% Efficient Energy Harvesting and Power Management Unit for Sub-µW Power Biomedical Applications0 a71 Efficient Energy Harvesting and Power Management Unit for Sub aTurin, ItalybIEEE1 aRoy, Abhishek1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/71-efficient-energy-harvesting-and-power-management-unit-sub-%C2%B5w-power-biomedical-applications-000660nas a2200193 4500008004100000245006900041210006400110260002300174100001700197700002200214700001800236700001700254700001300271700002100284700001800305700002400323700002300347856009600370 2017 eng d00aAn 8.3 nW -72 dBm Event Driven IoE Wake Up Receiver RF Front End0 a83 nW 72 dBm Event Driven IoE Wake Up Receiver RF Front End aNuremberg, Germany1 aMoody, Jesse1 aBassirian, Pouyan1 aRoy, Abhishek1 aFeng, Yukang1 aLi, Shuo1 aCostanzo, Robert1 aBarker, Scott1 aCalhoun, Benton, H.1 aBowers, Steven, M. uhttps://rlpvlsi.ece.virginia.edu/83-nw-72-dbm-event-driven-ioe-wake-receiver-rf-front-end-000873nas a2200253 4500008004100000020002200041245008700063210006900150260003200219100001700251700002600268700002000294700001800314700002100332700001600353700001500369700001800384700001300402700001800415700002200433700002500455700002400480856011500504 2017 eng d a978-4-86348-614-000aA battery-less 507nW SoC with integrated platform power manager and SiP interfaces0 abatteryless 507nW SoC with integrated platform power manager and aKyoto, JapanbIEEEc06/20171 aYahya, Farah1 aLukas, Christopher, J1 aBreiholz, Jacob1 aRoy, Abhishek1 aPatel, Harsh, N.1 aLiu, NingXi1 aChen, Xing1 aKosari, Avish1 aLi, Shuo1 aAkella, Divya1 aAyorinde, Oluseyi1 aWentzloff, David, D.1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/battery-less-507nw-soc-integrated-platform-power-manager-and-sip-interfaces-000504nas a2200121 4500008004100000245007300041210006800114260002900182100002100211700002600232700002400258856010000282 2017 eng d00aFAR: A 4.12uW Ferro-electric Auto-Recovery for Battery-less BSN SoCs0 aFAR A 412uW Ferroelectric AutoRecovery for Batteryless BSN SoCs aTurin, ItalybIEEEc20171 aYahya, Farah, B.1 aLukas, Christopher, J1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/far-412uw-ferro-electric-auto-recovery-battery-less-bsn-socs-000573nas a2200121 4500008004100000245010300041210006900144260003600213100002600249700002100275700002400296856013100320 2017 eng d00aModeling Trans-threshold Correlations for Reducing Functional Test Time in Ultra-Low Power Systems0 aModeling Transthreshold Correlations for Reducing Functional Tes aFort Worth, TX, USAbIEEEc20171 aLukas, Christopher, J1 aYahya, Farah, B.1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/modeling-trans-threshold-correlations-reducing-functional-test-time-ultra-low-power-systems-100568nas a2200121 4500008004100000245010000041210006900141260004000210100002100250700002000271700002400291856013100315 2017 eng d00aSoft Errors: Reliability Challenges in Energy-Constrained ULP Body Sensor Networks Applications0 aSoft Errors Reliability Challenges in EnergyConstrained ULP Body aThessaloniki, GreecebIEEEc06/20171 aPatel, Harsh, N.1 aMann, Randy, W.1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/soft-errors-reliability-challenges-energy-constrained-ulp-body-sensor-networks-applications-000494nas a2200121 4500008004100000245006700041210006400108260003500172100002100207700002100228700002400249856009900273 2017 eng d00aSubthreshold SRAM: Challenges, Design Decisions, and Solutions0 aSubthreshold SRAM Challenges Design Decisions and Solutions aBoston, MA, USAbIEEEc08/20171 aPatel, Harsh, N.1 aYahya, Farah, B.1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/subthreshold-sram-challenges-design-decisions-and-solutions-000378nas a2200109 4500008004100000245004900041210004400090100001100134700002200145700002400167856007700191 2017 eng d00aAn Ultra-Low-Power FPGA for IoT Applications0 aUltraLowPower FPGA for IoT Applications1 aQi, He1 aAyorinde, Oluseyi1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/ultra-low-power-fpga-iot-applications-100579nas a2200121 4500008004100000245012100041210006900162260003400231100001100265700002200276700002400298856013500322 2016 eng d00aAn Energy-Efficient Near/Sub-Threshold FPGA Interconnect Architecture Using Dynamic Voltage Scaling and Power-Gating0 aEnergyEfficient NearSubThreshold FPGA Interconnect Architecture aXi’an, ChinabIEEEc12/20161 aQi, He1 aAyorinde, Oluseyi1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/energy-efficient-nearsub-threshold-fpga-interconnect-architecture-using-dynamic-voltage-scaling-000513nas a2200121 4500008004100000245008500041210006900126260002500195100001700220700001700237700002400254856011300278 2016 eng d00aImproving Reliability and Energy Requirements of Memory in Body Sensor Networks.0 aImproving Reliability and Energy Requirements of Memory in Body aKolkata, IndiabIEEE1 aPatel, Harsh1 aYahya, Farah1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/improving-reliability-and-energy-requirements-memory-body-sensor-networks-000440nas a2200109 4500008004100000245007900041210006900120260002000189100002600209700002400235856007100259 2015 eng d00aA 0.38 pJ/bit 1.24 nW Chip-to-Chip Serial Link for Ultra-Low Power Systems0 a038 pJbit 124 nW ChiptoChip Serial Link for UltraLow Power Syste aLisbonc05/20151 aLukas, Christopher, J1 aCalhoun, Benton, H. uhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=716928300575nas a2200121 4500008004100000245011500041210006900156260003200225100002100257700002000278700002400298856013100322 2015 eng d00aA 130nm Canary SRAM for SRAM Dynamic Write VMIN Tracking across Voltage, Frequency, and Temperature Variations0 a130nm Canary SRAM for SRAM Dynamic Write VMIN Tracking across Vo aSan Jose, CAbIEEEc09/20151 aBanerjee, Arijit1 aBreiholz, Jacob1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/130nm-canary-sram-sram-dynamic-write-vmin-tracking-across-voltage-frequency-and-temperature-100512nas a2200121 4500008004100000245007500041210006900116260003600185100001800221700002500239700002400264856010200288 2015 eng d00aA 23 nW CMOS ultra-Low Power Temperature Sensor Operational from 0.2 V0 a23 nW CMOS ultraLow Power Temperature Sensor Operational from 02 aRohnert Park, CAbIEEEc10/20151 aAkella, Divya1 aShrivastava, Aatmesh1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/23-nw-cmos-ultra-low-power-temperature-sensor-operational-02-v-000572nas a2200133 4500008004100000245008900041210006900130260003600199100002100235700002100256700001900277700002400296856011800320 2015 eng d00aCombining SRAM Read/Write Assist Techniques for Near/Sub-Threshold Voltage Operation0 aCombining SRAM ReadWrite Assist Techniques for NearSubThreshold aKuala Lumpur, Malaysiac08/20151 aYahya, Farah, B.1 aPatel, Harsh, N.1 aChandra, Vikas1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/combining-sram-readwrite-assist-techniques-nearsub-threshold-voltage-operation-000478nas a2200109 4500008004100000245008700041210006900128100001700197700001800214700002400232856011200256 2015 eng d00aVirtual Prototyper (ViPro): An SRAM Design Tool for Yield Constrained Optimization0 aVirtual Prototyper ViPro An SRAM Design Tool for Yield Constrain1 aBoley, James1 aBeshay, Peter1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/virtual-prototyper-vipro-sram-design-tool-yield-constrained-optimization-000635nas a2200145 4500008004100000245012700041210006900168100001600237700002300253700001700276700002200293700001500315700002400330856013500354 2014 eng d00aA 32b 90nm Processor Implementing Panoptic DVS Achieving Energy Efficient Operation from Sub-threshold to High Performance0 a32b 90nm Processor Implementing Panoptic DVS Achieving Energy Ef1 aCraig, Kyle1 aShakhsheer, Yousef1 aArrabi, Saad1 aKhanna, Sudhanshu1 aLach, John1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/32b-90nm-processor-implementing-panoptic-dvs-achieving-energy-efficient-operation-sub-threshold-000543nas a2200133 4500008004100000245009100041210006900132260001200201100001800213700001900231700001900250700002400269856011600293 2014 eng d00aA Digital Dynamic Write Margin Sensor for Low Power Read/Write Operations in 28nm SRAM0 aDigital Dynamic Write Margin Sensor for Low Power ReadWrite Oper c08/20141 aBeshay, Peter1 aChandra, Vikas1 aAitken, Robert1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/digital-dynamic-write-margin-sensor-low-power-readwrite-operations-28nm-sram-000545nas a2200133 4500008004100000245009200041210006900133260001200202100002500214700002000239700001600259700002400275856011200299 2013 eng d00aA 50nW, 100kbps Clock/Data Recovery Circuit in an FSK RF Receiver on a Body Sensor Node0 a50nW 100kbps ClockData Recovery Circuit in an FSK RF Receiver on c01/20131 aShrivastava, Aatmesh1 aPandey, Jagdish1 aOtis, Brian1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/50nw-100kbps-clockdata-recovery-circuit-fsk-rf-receiver-body-sensor-node-000901nas a2200265 4500008004100000245009800041210006900139260001200208300001200220490000700232100001900239700001500258700002300273700002200296700002400318700002200342700001700364700002000381700002500401700002200426700001700448700002400465700002000489856012600509 2013 eng d00aA Batteryless 19 uW MICS/ISM-Band Energy Harvesting Body Sensor Node SoC for ExG Applications0 aBatteryless 19 uW MICSISMBand Energy Harvesting Body Sensor Node c01/2013 a199-2130 v481 aZhang, Yanqing1 aZhang, Fan1 aShakhsheer, Yousef1 aSilver, Jason, D.1 aKlinefelter, Alicia1 aNagaraju, Manohar1 aBoley, James1 aPandey, Jagdish1 aShrivastava, Aatmesh1 aCarlson, Eric, J.1 aWood, Austin1 aCalhoun, Benton, H.1 aOtis, Brian, P. uhttps://rlpvlsi.ece.virginia.edu/batteryless-19-uw-micsism-band-energy-harvesting-body-sensor-node-soc-exg-applications-001741nas a2200121 4500008004100000245009700041210006900138260001200207520130900219100002501528700002401553856004201577 2013 eng d00aA DC-DC Converter Efficiency Model for System Level Analysis in Ultra Low Power Applications0 aDCDC Converter Efficiency Model for System Level Analysis in Ult c06/20133 aThis paper presents a model of inductor based DC-DC converters that can be used to study the impact of power management techniques such as dynamic voltage and frequency scaling (DVFS). System level power models of low power systems on chip (SoCs) and power management strategies cannot be correctly established without accounting for the associated overhead related to the DC-DC converters that provide regulated power to the system. The proposed model accurately predicts the efficiency of inductor based DC-DC converters with varying topologies and control schemes across a range of output voltage and current loads. It also accounts for the energy and timing overhead associated with the change in the operating condition of the regulator. Since modern SoCs employ power management techniques that vary the voltage and current loads seen by the converter, accurate modeling of the impact on the converter efficiency becomes critical. We use this model to compute the overall cost of two power distribution strategies for a SoC with multiple voltage islands. The proposed model helps us to obtain the energy benefits of a power management technique and can also be used as a basis for comparison between power management techniques or as a tool for design space exploration early in a SoC design cycle.1 aShrivastava, Aatmesh1 aCalhoun, Benton, H. uhttp://www.mdpi.com/2079-9268/3/3/21500435nas a2200121 4500008004100000245008600041210006900127260001200196100001800208700002100226700002400247856004200271 2013 eng d00aA Digital Auto-Zeroing Circuit to Reduce Offset in Sub-threshold Sense Amplifiers0 aDigital AutoZeroing Circuit to Reduce Offset in Subthreshold Sen c05/20131 aBeshay, Peter1 aRyan, Joseph, F.1 aCalhoun, Benton, H. uhttp://www.mdpi.com/2079-9268/3/2/15900512nas a2200145 4500008004100000245006900041210006800110490001800178100002500196700002700221700002400248700002200272700002000294856005200314 2013 eng d00aEffect of Angle on Flow-Induced Vibrations of Pinniped Vibrissae0 aEffect of Angle on FlowInduced Vibrations of Pinniped Vibrissae0 vVol. 8, No. 71 aMurphy, Christin, T.1 aEberhardt, William, C.1 aCalhoun, Benton, H.1 aMann, Kenneth, A.1 aMann, David, A. uhttp://dx.plos.org/10.1371/journal.pone.006987200511nas a2200109 4500008004100000245009300041210006900134260003400203100001900237700002400256856012100280 2013 eng d00aHold Time Closure for Subthreshold Circuits Using a Two-Phase, Latch Based Timing Method0 aHold Time Closure for Subthreshold Circuits Using a TwoPhase Lat aMonterey, Californiac10/20131 aZhang, Yanqing1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/hold-time-closure-subthreshold-circuits-using-two-phase-latch-based-timing-method-000598nas a2200181 4500008004100000245007000041210006500111260001700176653000700193653001200200653002100212653000900233653001100242653001600253100002100269700002400290856010200314 2013 eng d00aAn Ultra Low Energy 9T Half-select-free Subthreshold SRAM bitcell0 aUltra Low Energy 9T Halfselectfree Subthreshold SRAM bitcell aMonterey, CA10a9T10abitcell10ahalf-select-free10aSRAM10aSub-VT10asubthrehold1 aBanerjee, Arijit1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/ultra-low-energy-9t-half-select-free-subthreshold-sram-bitcell-000470nas a2200109 4500008004100000245007500041210006900116260002800185100002500213700002400238856009800262 2012 eng d00aA 150nW, 5ppm/oC, 100kHz On-Chip Clock Source for Ultra Low Power SoCs0 a150nW 5ppmoC 100kHz OnChip Clock Source for Ultra Low Power SoCs aSan JosebIEEEc09/20121 aShrivastava, Aatmesh1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/150nw-5ppmoc-100khz-chip-clock-source-ultra-low-power-socs-100428nas a2200121 4500008004100000245005400041210005200095260001200147100001600159700001900175700002400194856008800218 2012 eng d00aDark vs. Dim Silicon and Near-Threshold Computing0 aDark vs Dim Silicon and NearThreshold Computing c06/20121 aWang, Liang1 aSkadron, Kevin1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/dark-vs-dim-silicon-and-near-threshold-computing-000444nam a2200109 4500008004100000020002200041245006500063210006500128260002300193100002400216856009400240 2012 eng d a978-1-934891-14-800aDesign Principles for Digital CMOS Integrated Circuit Design0 aDesign Principles for Digital CMOS Integrated Circuit Design bNTS Pressc03/20121 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/design-principles-digital-cmos-integrated-circuit-design00489nas a2200109 4500008004100000245008800041210006900129260001200198100002500210700002400235856012000259 2012 eng d00aModeling DC-DC Converter Efficiency and Power Management in Ultra Low Power Systems0 aModeling DCDC Converter Efficiency and Power Management in Ultra c10/20121 aShrivastava, Aatmesh1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/modeling-dc-dc-converter-efficiency-and-power-management-ultra-low-power-systems-000522nas a2200109 4500008004100000245010800041210006900149100001600218700002300234700002400257856013100281 2012 eng d00aOptimal Power Switch Design for Dynamic Voltage Scaling from High Performance to Subthreshold Operation0 aOptimal Power Switch Design for Dynamic Voltage Scaling from Hig1 aCraig, Kyle1 aShakhsheer, Yousef1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/optimal-power-switch-design-dynamic-voltage-scaling-high-performance-subthreshold-operation-000890nas a2200253 4500008004100000022001400041245010100055210006900156260001200225300000800237490000700245653002600252653002700278653002200305653003500327653002600362653001600388653002100404100002400425700001900449700001600468700002400484856012800508 2012 eng d a1549-774700aA Programmable 34 nW/Channel Sub-Threshold Signal Band Power Extractor on a Body Sensor Node SoC0 aProgrammable 34 nWChannel SubThreshold Signal Band Power Extract c12/2012 a9410 v5910aComputer architecture10aElectroencephalography10aEnergy harvesting10aFinite impulse response filter10aLow power electronics10aLow voltage10aSystem-on-a-chip1 aKlinefelter, Alicia1 aZhang, Yanqing1 aOtis, Brian1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/programmable-34-nwchannel-sub-threshold-signal-band-power-extractor-body-sensor-node-soc-000625nas a2200157 4500008004100000245009400041210006900135100001600204700002300220700002200243700001700265700001500282700002400297700002300321856012300344 2012 eng d00aA Programmable Resistive Power Grid for Post-Fabrication Flexibility and Energy Tradeoffs0 aProgrammable Resistive Power Grid for PostFabrication Flexibilit1 aCraig, Kyle1 aShakhsheer, Yousef1 aKhanna, Sudhanshu1 aArrabi, Saad1 aLach, John1 aCalhoun, Benton, H.1 aKosonocky, Stephen uhttps://rlpvlsi.ece.virginia.edu/programmable-resistive-power-grid-post-fabrication-flexibility-and-energy-tradeoffs-000559nas a2200157 4500008004100000245007500041210006900116260001200185100001700197700001300214700002400227700001500251700001900266700002100285856009500306 2012 eng d00aReducing the Cost of Safety-Critical Systems with On-Demand Redundancy0 aReducing the Cost of SafetyCritical Systems with OnDemand Redund c09/20121 aSzafaryn, L.1 aChen, J.1 aCalhoun, Benton, H.1 aLach, John1 aSkadron, Kevin1 aMeyer, Brett, H. uhttps://rlpvlsi.ece.virginia.edu/reducing-cost-safety-critical-systems-demand-redundancy-000521nas a2200145 4500008004100000245006200041210006200103260001200165100001800177700002000195700002000215700001900235700002400254856009700278 2012 eng d00aSRAM Sense Amplifier Offset Cancellation Using BTI Stress0 aSRAM Sense Amplifier Offset Cancellation Using BTI Stress c10/20121 aBeshay, Peter1 aBolus, Jonathan1 aBlalock, Travis1 aChandra, Vikas1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/sram-sense-amplifier-offset-cancellation-using-bti-stress-000494nas a2200121 4500008004100000245007600041210006900117260001200186100001800198700002100216700002400237856011100261 2012 eng d00aSub-threshold Sense Amplifier Compensation Using Auto-zeroing Circuitry0 aSubthreshold Sense Amplifier Compensation Using Autozeroing Circ c10/20121 aBeshay, Peter1 aRyan, Joseph, F.1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/sub-threshold-sense-amplifier-compensation-using-auto-zeroing-circuitry-000399nas a2200097 4500008004100000245006300041210006300104100002100167700002400188856008900212 2011 eng d00a5T SRAM with Asymmetric Sizing for Improved Read Stability0 a5T SRAM with Asymmetric Sizing for Improved Read Stability1 aNalam, Satyanand1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/5t-sram-asymmetric-sizing-improved-read-stability-000690nas a2200205 4500008004100000245006800041210006700109100002400176700001500200700002000215700002500235700002200260700001600282700002300298700001400321700001800335700002000353700001900373856009200392 2011 eng d00aBody Sensor Networks: A Holistic Approach From Silicon to Users0 aBody Sensor Networks A Holistic Approach From Silicon to Users1 aCalhoun, Benton, H.1 aLach, John1 aStankovic, John1 aWentzloff, David, D.1 aWhitehouse, Kamin1 aBarth, Adam1 aBrown, Jonathan, K1 aLi, Qiang1 aOh, Seunghyun1 aRoberts, Nathan1 aZhang, Yanqing uhttps://rlpvlsi.ece.virginia.edu/body-sensor-networks-holistic-approach-silicon-users-000412nas a2200097 4500008004100000245007000041210006500111100001900176700002400195856009500219 2011 eng d00aThe Cost of Fixing Hold Time Violations in Sub-threshold Circuits0 aCost of Fixing Hold Time Violations in Subthreshold Circuits1 aZhang, Yanqing1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/cost-fixing-hold-time-violations-sub-threshold-circuits-000724nas a2200241 4500008004100000022001400041245005000055210005000105260001200155653002500167653002800192653002700220653002300247100001900270700002300289700002000312700002200332700002500354700002100379700001500400700002400415856004300439 2011 eng d a2079-926800aEnergy Efficient Design for Body Sensor Nodes0 aEnergy Efficient Design for Body Sensor Nodes c04/201110abody sensor networks10aenergy efficient design10asub-threshold circuits10awearable computing1 aZhang, Yanqing1 aShakhsheer, Yousef1 aBarth, Adam, T.1 aPowell, Harry, C.1 aRidenour, Samuel, A.1 aHanson, Mark, A.1 aLach, John1 aCalhoun, Benton, H. uhttp://www.mdpi.com/2079-9268/1/1/109/00466nas a2200109 4500008004100000245007900041210006900120100001800189700002300207700002400230856010200254 2011 eng d00aAn Enhanced Canary-based System with BIST for SRAM Standby Power Reduction0 aEnhanced Canarybased System with BIST for SRAM Standby Power Red1 aWang, Jiajing1 aHoefler, Alexander1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/enhanced-canary-based-system-bist-sram-standby-power-reduction-000599nas a2200133 4500008004100000245012600041210006900167260001200236100002500248700002100273700002400294700002000318856012700338 2011 eng d00aFlow-induced Vibrations of Pinniped Vibrissae: Effects of Angular Orientation and Implications for Hydrodynamic Reception0 aFlowinduced Vibrations of Pinniped Vibrissae Effects of Angular c11/20111 aMurphy, Christin, T.1 aEberhardt, Craig1 aCalhoun, Benton, H.1 aMann, David, A. uhttps://rlpvlsi.ece.virginia.edu/flow-induced-vibrations-pinniped-vibrissae-effects-angular-orientation-and-implications-000550nas a2200121 4500008004100000245010100041210006900142100001600211700002300227700002200250700002400272856013200296 2011 eng d00aOptimal Power Switch Design for Panoptic Dynamic Voltage Scaling Enabling Subthreshold Operation0 aOptimal Power Switch Design for Panoptic Dynamic Voltage Scaling1 aCraig, Kyle1 aShakhsheer, Yousef1 aKhanna, Sudhanshu1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/optimal-power-switch-design-panoptic-dynamic-voltage-scaling-enabling-subthreshold-operation-000442nas a2200097 4500008004100000245007900041210006900120100002500189700002400214856010600238 2011 eng d00aA sub-threshold clock and data recovery circuit for a wireless sensor node0 asubthreshold clock and data recovery circuit for a wireless sens1 aShrivastava, Aatmesh1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/sub-threshold-clock-and-data-recovery-circuit-wireless-sensor-node-000549nas a2200157 4500008004100000245006400041210005900105260001200164100002400176700001900200700002200219700001600241700002300257700001500280856009600295 2011 eng d00aA Sub-Threshold FPGA: Energy-Efficient Reconfigurable Logic0 aSubThreshold FPGA EnergyEfficient Reconfigurable Logic c03/20111 aCalhoun, Benton, H.1 aZhang, Yanqing1 aKhanna, Sudhanshu1 aCraig, Kyle1 aShakhsheer, Yousef1 aLach, John uhttps://rlpvlsi.ece.virginia.edu/sub-threshold-fpga-energy-efficient-reconfigurable-logic-000470nas a2200133 4500008004100000245006400041210006200105260001200167300001000179490000700189100002400196700001800220856009800238 2010 eng d00aCan Subthreshold and Near-Threshold Circuits Go Mainstream?0 aCan Subthreshold and NearThreshold Circuits Go Mainstream c06/2010 a80-850 v301 aCalhoun, Benton, H.1 aBrooks, David uhttps://rlpvlsi.ece.virginia.edu/can-subthreshold-and-near-threshold-circuits-go-mainstream-000518nas a2200145 4500008004100000245006800041210006300109260001200172300001200184490000700196100002400203700002400227700002400251856009700275 2010 eng d00aAn Energy-Efficient Subthreshold Level Converter in 130-nm CMOS0 aEnergyEfficient Subthreshold Level Converter in 130nm CMOS c04/2010 a290-2940 v571 aWooters, Stuart, N.1 aCalhoun, Benton, H.1 aBlalock, Travis, N. uhttps://rlpvlsi.ece.virginia.edu/energy-efficient-subthreshold-level-converter-130-nm-cmos-000745nas a2200205 4500008004100000245010100041210006900142260001500211100002300226700001900249700001300268700002100281700002100302700001500323700001700338700001900355700001500374700002400389856012600413 2010 eng d00aExploiting Dynamically Changing Parallelism with a Reconfigurable Array of Homogeneous Sub-cores0 aExploiting Dynamically Changing Parallelism with a Reconfigurabl c13/09/20101 aGuevara, Marisabel1 aMarino, M., D.1 aMeng, J.1 aSatyamoorthy, P.1 aSzafaryn, L., G.1 aWu, Puqing1 aMeyer, Brett1 aSkadron, Kevin1 aLach, John1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/exploiting-dynamically-changing-parallelism-reconfigurable-array-homogeneous-sub-cores-000549nas a2200169 4500008004100000245006000041210006000101260001200161300001200173490000700185100002400192700001700216700002200233700001800255700001500273856009100288 2010 eng d00aFlexible Circuits and Architectures for Ultra Low Power0 aFlexible Circuits and Architectures for Ultra Low Power c02/2010 a267-2820 v981 aCalhoun, Benton, H.1 aRyan, Joseph1 aKhanna, Sudhanshu1 aPutic, Mateja1 aLach, John uhttps://rlpvlsi.ece.virginia.edu/flexible-circuits-and-architectures-ultra-low-power-000469nas a2200145 4500008004100000245004600041210004400087260002700131300001200158100001400170700001800184700002400202700001700226856008000243 2010 eng d00aSRAM-Based NBTI/PBTI Sensor System Design0 aSRAMBased NBTIPBTI Sensor System Design aSan Diego, CAc06/2010 a849-8521 aQi, Jerry1 aWang, Jiajing1 aCalhoun, Benton, H.1 aStan, Mircea uhttps://rlpvlsi.ece.virginia.edu/sram-based-nbtipbti-sensor-system-design-000517nas a2200133 4500008004100000020002200041245006900063210006900132260001100201100001800212700002400230700002300254856010600277 2010 eng d a978-953-307-045-200aStandby Supply Voltage Minimization for Reliable Nanoscale SRAMs0 aStandby Supply Voltage Minimization for Reliable Nanoscale SRAMs bINTECH1 aWang, Jiajing1 aCalhoun, Benton, H.1 aSwart, Jacobus, W. uhttp://sciyo.com/articles/show/title/standby-supply-voltage-minimization-for-reliable-nanoscale-srams00455nas a2200109 4500008004100000245007500041210006900116260001500185100002100200700002400221856010000245 2010 eng d00aA Sub-Threshold FPGA with Low-Swing Dual-VDD Interconnect in 90nm CMOS0 aSubThreshold FPGA with LowSwing DualVDD Interconnect in 90nm CMO c20/09/20101 aRyan, Joseph, F.1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/sub-threshold-fpga-low-swing-dual-vdd-interconnect-90nm-cmos-000595nas a2200157 4500008004100000245011300041210006900154260002700223300001200250100002400262700002200286700001900308700001700327700001600344856007700360 2010 eng d00aSystem Design Principles Combining Sub-threshold Circuits and Architectures with Energy Scavening Mechanisms0 aSystem Design Principles Combining Subthreshold Circuits and Arc aParis, Francec05/2010 a269-2721 aCalhoun, Benton, H.1 aKhanna, Sudhanshu1 aZhang, Yanqing1 aRyan, Joseph1 aOtis, Brian uhttp://class6.ee.virginia.edu/bentemp/drupal/files/Calhoun_ISCAS2010.pdf00581nas a2200157 4500008004100000245008700041210006900128260001200197300001400209490000700223100001800230700001900248700002200267700002400289856011000313 2010 eng d00aTwo Fast Methods for Estimating the Minimum Standby Supply Voltage for Large SRAMs0 aTwo Fast Methods for Estimating the Minimum Standby Supply Volta c12/2010 a1908-19200 v291 aWang, Jiajing1 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a2200157 4500008004100000245009200041210006900133260001400202100002400216700002000240700002200260700002200282700002000304700002400324856012300348 2009 eng d00aSub-threshold Operation and Cross-Hierarchy Design for Ultra Low Power Wearable Sensors0 aSubthreshold Operation and CrossHierarchy Design for Ultra Low P c5/24/20091 aCalhoun, Benton, H.1 aBolus, Jonathan1 aKhanna, Sudhanshu1 aJurik, Andrew, D.1 aWeaver, Alf, F.1 aBlalock, Travis, N. uhttps://rlpvlsi.ece.virginia.edu/sub-threshold-operation-and-cross-hierarchy-design-ultra-low-power-wearable-sensors-000648nas a2200181 4500008004100000245008500041210006900126260001200195300001200207490000700219100002400226700002000250700001300270700002600283700002200309700002500331856011000356 2008 eng d00aDigital Circuit Design Challenges and Opportunities in the Era of Nanoscale CMOS0 aDigital Circuit Design Challenges and Opportunities in the Era o c02/2008 a343-3650 v961 aCalhoun, Benton, H.1 aCao, Xin, Li Yu1 aMai, Ken1 aPileggi, Lawrence, T.1 aRutenbar, Rob, A.1 aShepard, Kenneth, L. uhttps://rlpvlsi.ece.virginia.edu/digital-circuit-design-challenges-and-opportunities-era-nanoscale-cmos-000446nas a2200109 4500008004100000245007200041210006900113260001200182100001800194700002400212856010000236 2008 eng d00aAn Enhanced Adaptive Canary System for SRAM Standby Power Reduction0 aEnhanced Adaptive Canary System for SRAM Standby Power Reduction c09/20081 aWang, Jiajing1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/enhanced-adaptive-canary-system-sram-standby-power-reduction-000514nas a2200121 4500008004100000245009300041210006900134260001200203300001200215100002100227700002400248856012000272 2008 eng d00aMinimizing Offset for Latching Voltage-Mode Sense Amplifiers for Sub-threshold Operation0 aMinimizing Offset for Latching VoltageMode Sense Amplifiers for c03/2008 a127-1321 aRyan, Joseph, F.1 aCalhoun, Benton, H. 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aRutenbar, Rob, A. uhttps://rlpvlsi.ece.virginia.edu/recursive-statistical-blockade-enhanced-technique-rare-event-simulation-application-sram-circuit-000518nas a2200133 4500008004100000245008700041210006900128260001200197300001400209490000700223100001800230700002400248856011200272 2008 eng d00aTechniques to Extend Canary-based Standby VDD Scaling for SRAMs to 45nm and Beyond0 aTechniques to Extend Canarybased Standby VDD Scaling for SRAMs t c11/2008 a2514-25230 v431 aWang, Jiajing1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/techniques-extend-canary-based-standby-vdd-scaling-srams-45nm-and-beyond-000504nas a2200133 4500008004100000245007500041210006900116260001200185300001200197490000700209100002400216700002600240856010400266 2007 eng d00aA 256kb 65nm Sub-threshold SRAM Design for Ultra-low Voltage Operation0 a256kb 65nm Subthreshold SRAM Design for Ultralow Voltage Operati c03/2007 a680-6880 v421 aCalhoun, Benton, H.1 aChandrakasan, Anantha uhttps://rlpvlsi.ece.virginia.edu/256kb-65nm-sub-threshold-sram-design-ultra-low-voltage-operation-000517nas a2200133 4500008004100000245007600041210006900117260001500186300001200201100002100213700001800234700002400252856010700276 2007 eng d00aAnalyzing and Modeling Process Balance for Sub-threshold Circuit Design0 aAnalyzing and Modeling Process Balance for Subthreshold Circuit c00/03/2007 a275-2801 aRyan, Joseph, F.1 aWang, Jiajing1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/analyzing-and-modeling-process-balance-sub-threshold-circuit-design-000477nas a2200121 4500008004100000245007600041210006900117260001500186300001000201100001800211700002400229856010200253 2007 eng d00aCanary Replica Feedback for Near-DRV Standby VDD Scaling in a 90nm SRAM0 aCanary Replica Feedback for NearDRV Standby VDD Scaling in a 90n c00/09/2007 a29-321 aWang, Jiajing1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/canary-replica-feedback-near-drv-standby-vdd-scaling-90nm-sram-000558nas a2200145 4500008004100000245008500041210006900126260001500195300001200210100001800222700001900240700002200259700002400281856010700305 2007 eng d00aStatistical Modeling for the Minimum Standby Supply Voltage of a Full SRAM Array0 aStatistical Modeling for the Minimum Standby Supply Voltage of a c00/09/2007 a400-4031 aWang, Jiajing1 aSinghee, Amith1 aRutenbar, Rob, A.1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/statistical-modeling-minimum-standby-supply-voltage-full-sram-array-000528nas a2200145 4500008004100000245006500041210006400106260001500170100001600185700002400201700001800225700001700243700002600260856009600286 2007 eng d00aUltra-Dynamic Voltage Scaling for Energy Starved Electronics0 aUltraDynamic Voltage Scaling for Energy Starved Electronics c00/03/20071 aWang, Alice1 aCalhoun, Benton, H.1 aVerma, Naveen1 aKwong, Joyce1 aChandrakasan, Anantha uhttps://rlpvlsi.ece.virginia.edu/ultra-dynamic-voltage-scaling-energy-starved-electronics-000448nas a2200121 4500008004100000245004400041210004100085260006400126300001200190100002400202700002600226856007400252 2006 eng d00aA 256kb Sub-threshold SRAM in 65nm CMOS0 a256kb Subthreshold SRAM in 65nm CMOS aIEEE International Solid-State Circuits Conferencec02/2006 a628-6291 aCalhoun, Benton, H.1 aChandrakasan, Anantha uhttps://rlpvlsi.ece.virginia.edu/256kb-sub-threshold-sram-65nm-cmos-000470nas a2200157 4500008004100000245003800041210003800079260001300117100002400130700002000154700001600174700002600190700000500216700001800221856007300239 2006 eng d00aLow Energy Digital Circuit Design0 aLow Energy Digital Circuit Design bSpringer1 aCalhoun, Benton, H.1 aSchurgers, Curt1 aWang, Alice1 aChandrakasan, Anantha1 a1 aOuwerkerk, M. uhttps://rlpvlsi.ece.virginia.edu/low-energy-digital-circuit-design-000544nas a2200193 4500008004100000245003200041210003200073260001200105300001200117490000600129100003000135700001800165700001700183700001600200700001800216700002500234700002400259856006700283 2006 eng d00aMicropower Wireless Sensors0 aMicropower Wireless Sensors c05/2006 a459-4620 v31 aChandrakasan, Anantha, P.1 aVerma, Naveen1 aKwong, Joyce1 aDaly, Denis1 aIckes, Nathan1 aFinchelstein, Daniel1 aCalhoun, Benton, H. uhttps://rlpvlsi.ece.virginia.edu/micropower-wireless-sensors-000492nas a2200157 4500008004100000245004500041210004500086260001300131300001000144100002400154700000500178700002600183700001900209700002600228856008000254 2006 eng d00aPower Gating and Dynamic Voltage Scaling0 aPower Gating and Dynamic Voltage Scaling bSpringer a41-751 aCalhoun, Benton, H.1 a1 aChandrakasan, Anantha1 aNarendra, Siva1 aChandrakasan, Anantha uhttps://rlpvlsi.ece.virginia.edu/power-gating-and-dynamic-voltage-scaling-000495nas a2200133 4500008004100000245007000041210006900111260001200180300001400192490000700206100002400213700002600237856009800263 2006 eng d00aStatic Noise Margin Variation for Sub-threshold SRAM in 65nm CMOS0 aStatic Noise Margin Variation for Subthreshold SRAM in 65nm CMOS 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aChandrakasan, Anantha uhttps://rlpvlsi.ece.virginia.edu/ultra-dynamic-voltage-scaling-udvs-using-sub-threshold-operation-and-local-voltage-dithering-000474nas a2200121 4500008004100000245007000041210006900111260001200180300001200192100002400204700002600228856009800254 2005 eng d00aAnalyzing Static Noise Margin for Sub-threshold SRAM in 65nm CMOS0 aAnalyzing Static Noise Margin for Subthreshold SRAM in 65nm CMOS c09/2005 a363-3661 aCalhoun, Benton, H.1 aChandrakasan, Anantha uhttps://rlpvlsi.ece.virginia.edu/analyzing-static-noise-margin-sub-threshold-sram-65nm-cmos-000700nas a2200205 4500008004100000245007400041210006900115260001200184300001200196490000700208100002400215700002000239700001800259700002500277700002500302700001600327700002000343700002600363856010500389 2005 eng d00aDesign Considerations for Ultra-low Energy Wireless Microsensor Nodes0 aDesign Considerations for Ultralow Energy Wireless Microsensor N c06/2005 a727-7400 v541 aCalhoun, Benton, H.1 aDaly, Denis, D.1 aVerma, Naveen1 aFinchelstein, Daniel1 aWentzloff, David, D.1 aWang, Alice1 aCho, Seong-Hwan1 aChandrakasan, Anantha uhttps://rlpvlsi.ece.virginia.edu/design-considerations-ultra-low-energy-wireless-microsensor-nodes-000541nas a2200145 4500008004100000245007900041210006900120260001200189300001400201490000700215100002400222700001600246700002600262856010700288 2005 eng d00aModeling and Sizing for Minimum Energy Operation in Sub-threshold Circuits0 aModeling and Sizing for Minimum Energy Operation in Subthreshold c09/2005 a1778-17860 v401 aCalhoun, Benton, H.1 aWang, Alice1 aChandrakasan, Anantha uhttps://rlpvlsi.ece.virginia.edu/modeling-and-sizing-minimum-energy-operation-sub-threshold-circuits-000548nas a2200121 4500008004100000245010500041210006900146260001200215300001200227100002400239700002600263856013700289 2005 eng d00aUltra-Dynamic Voltage Scaling Using Sub-threshold Operation and Local Voltage Dithering in 90nm CMOS0 aUltraDynamic Voltage Scaling Using Subthreshold Operation and Lo c02/2005 a300-3011 aCalhoun, Benton, H.1 aChandrakasan, Anantha uhttps://rlpvlsi.ece.virginia.edu/ultra-dynamic-voltage-scaling-using-sub-threshold-operation-and-local-voltage-dithering-90nm-cmos-000501nas a2200121 4500008004100000245008300041210006900124260001200193300001000205100002400215700002600239856011400265 2004 eng d00aCharacterizing and Modeling Minimum Energy Operation for Subthreshold Circuits0 aCharacterizing and Modeling Minimum Energy Operation for Subthre c08/2004 a90-951 aCalhoun, Benton, H.1 aChandrakasan, Anantha uhttps://rlpvlsi.ece.virginia.edu/characterizing-and-modeling-minimum-energy-operation-subthreshold-circuits-000616nas a2200169 4500008004100000245008700041210006900128260001200197300001000209490000700219100001700226700002000243700001800263700002400281700002600305856011500331 2004 eng d00aDesign Considerations for Energy-Efficient Radios in Wireless Microsensor Networks0 aDesign Considerations for EnergyEfficient Radios in Wireless Mic c05/2004 a77-940 v371 aShih, Eugene1 aCho, Seong-Hwan1 aLee, Fred, S.1 aCalhoun, Benton, H.1 aChandrakasan, Anantha uhttps://rlpvlsi.ece.virginia.edu/design-considerations-energy-efficient-radios-wireless-microsensor-networks-000631nas a2200169 4500008004100000245008500041210006900126260001200195300001200207100002500219700002400244700001300268700001600281700001800297700003000315856011600345 2004 eng d00aDesign Considerations for Next Generation Wireless Power-Aware Microsensor Nodes0 aDesign Considerations for Next Generation Wireless PowerAware Mi c01/2004 a361-3671 aWentzloff, David, D.1 aCalhoun, Benton, H.1 aMin, Rex1 aWang, Alice1 aIckes, Nathan1 aChandrakasan, Anantha, P. uhttps://rlpvlsi.ece.virginia.edu/design-considerations-next-generation-wireless-power-aware-microsensor-nodes-000504nas a2200133 4500008004100000245007200041210006900113260001200182300001000194100002400204700001600228700002600244856010000270 2004 eng d00aDevice Sizing for Minimum Energy Operation in Subthreshold Circuits0 aDevice Sizing for Minimum Energy Operation in Subthreshold Circu c10/2004 a95-981 aCalhoun, Benton, H.1 aWang, Alice1 aChandrakasan, Anantha uhttps://rlpvlsi.ece.virginia.edu/device-sizing-minimum-energy-operation-subthreshold-circuits-000493nas a2200145 4500008004100000245005900041210005700100260001200157300001200169490000700181100002400188700002100212700002600233856008800259 2004 eng d00aA Leakage Reduction Methodology for Distributed MTCMOS0 aLeakage Reduction Methodology for Distributed MTCMOS c05/2004 a818-8260 v391 aCalhoun, Benton, H.1 aHonore, Frank.A.1 aChandrakasan, Anantha uhttps://rlpvlsi.ece.virginia.edu/leakage-reduction-methodology-distributed-mtcmos-000528nas a2200133 4500008004100000245008300041210006900124260001200193300001400205490000700219100002400226700002600250856011800276 2004 eng d00aStandby Power Reduction Using Dynamic Voltage Scaling and Flip-Flop Structures0 aStandby Power Reduction Using Dynamic Voltage Scaling and FlipFl c09/2004 a1504-15110 v391 aCalhoun, Benton, H.1 aChandrakasan, Anantha uhttps://rlpvlsi.ece.virginia.edu/standby-power-reduction-using-dynamic-voltage-scaling-and-flip-flop-structures-000496nas a2200133 4500008004100000245006600041210006500107260001200172300001200184100002400196700002200220700002600242856009400268 2003 eng d00aDesign Methodology for Fine-Grained Leakage Control in MTCMOS0 aDesign Methodology for FineGrained Leakage Control in MTCMOS c08/2003 a104-1091 aCalhoun, Benton, H.1 aHonore, Frank, A.1 aChandrakasan, Anantha uhttps://rlpvlsi.ece.virginia.edu/design-methodology-fine-grained-leakage-control-mtcmos-000524nas a2200145 4500008004100000245006600041210006500107260001200172300001000184100001700194700002400211700002000235700002600255856009700281 2001 eng d00aEnergy-Efficient Link Layer for Wireless Microsensor Networks0 aEnergyEfficient Link Layer for Wireless Microsensor Networks c04/2001 a16-211 aShih, Eugene1 aCalhoun, Benton, H.1 aCho, Seong-Hwan1 aChandrakasan, Anantha uhttps://rlpvlsi.ece.virginia.edu/energy-efficient-link-layer-wireless-microsensor-networks-0